Camera Signal Process Block Diagram - Sony DCM-M1 Service Manual

DCM-M1

3-2. CAMERA SIGNAL PROCESS BLOCK DIAGRAM

VC-216 BOARD (1/2)
(SEE PAGE 4-13, 17)
CCD IMAGER
IC001
BUFFER
CCD OUT 8
Q001
TIMING GENERATOR
IC101
7 Vp-p
PBLK
H
REC/PB
CLPDM
V1 4 26 V1
V2 3 25 V2
V3 2 28 V3
XSHP
V4 1 31 V4
XSHD
SUB 13 33 VSHT
VCK (CL)
7 Vp-p
ZSG1
H
VGAT
REC/PB
ZV1
ID
3.28 Vp-p
AHD
18 MHz
AVD
REC/PB
CK
RG 10 18 RG
OSCO
H1 11 21 H1
H2 12 22 H2
OSCI
3.12 Vp-p
DSGAT
16.33 MHz
REC/PB
35 37 38 39 40
TO CAMERA CONTROL
1
(SEE PAGE 3-6)
05
1 Vp-p
H
CDS, AGC, A/D CONVERTER
REC/PB
IC102
26
CDS AGC
27
2 19 PBLK
CLPDM
1 23
TIMING
21 22 16 18 40
15
16
12
ZSG1
34
3.84 Vp-p
VGAT
36
18 MHz
ZV1
41
REC/PB
ID
48
TGHD
44
TGVD
45
7
2.88 Vp-p 3.04 Vp-p
V H
5
X101 REC/PB REC/PB
36MHz
OSC ADJ
4
IC104
42
2.24 Vp-p
36 MHz
REC/PB
3-3
CAMERA Y/C PROCESS
IC105 (1/2)
CLPOB 20
78 CLPOB
D0
I
D9 2 89 AD 0
A/D
S/H I I I
CONVERTER
11 80 AD 9
PGA CONT 1
29 3 AGC CONT 2
PGA CONT 2
30 2 AGC CONT 1
18MHz
69 CHCK
73 PBLK
74 ZSG1
71
VGAT
75 ZV1
72 ID
76
TGHD
77
TGVD
6 FRQ
SIGNAL PATH
REC
50
CN101 (1/2)
I
47
YO 0
I
YO 7 45
I
42
3.04 Vp-p
H
REC/PB
CO 0 40
I I
CO 3 37
CAMERA
HDO 51
Y/C
PROCESS
VDO 52
FLDO 53
2.88 Vp-p
V
REC/PB
13.5MHz
MCKO 63
VCK 65
2.96 Vp-p
2V
REC/PB
Approx.
3.4 Vp-p
13.5 MHz
REC/PB
2
TO CAMERA
CONTROL
(SEE PAGE 3-6)
VIDEO SIGNAL
CHROMA Y Y/CHROMA
3-4
A
TO A/V DATA CONTROL,
VIDEO OUT
8
Y0-Y7
(SEE PAGE 3-7)
I
15
16
C0-C3
I
19
CAM HD
7
CAM VD
6
SPCKO
3
CAM DD ON
B
29 TO SYSTEM CONTROL
(SEE PAGE 3-15)