Xerox Phaser 3300 Servce Manual page 67

Phaser 3300MFP Service Manual
ASIC
Items
Process
Package
Voltage
CPU Core
Operating Freq.
SDRAMC
ROMC
IOC
DMAC
HPVC
PVC
UART
INTERRUPT
TIMER
CIP4e
NAND Flash
Controller
MAC
GEU
RSH
Engine Controller
APC
Specification
0.13 um (STDH150)
496 PBGA (total pad number: 597 ea)
Function pin: about 367pins
PWR & GND pin: 130 pins ((130/496) x 100 = 26.2%)
PWR & GND pad: 204 ea ((204/597) x 100 = 34.17%)
Core Voltage: 1.2 V
I/O Pad Voltage: 3.3 V
RTC Voltage: 3 V
ARM 920T (I-Cache: 16 KB, D-Cache-16 KB)
CPU Core: over 300 MHz
Target System Bus: 100 MHz
32 Bits Only, 100 MHz
5 Banks (Up to 128 MB per Bank)
Feed-back clock (for SDRAM read) is appended
4 Banks (Up to 16 MB per Bank)
6 Banks (Up to 16 MB per Bank)
6 Channels (if CIP4e is not used, 4ch is available for external
DMA. If CIP4E is used (a4 DMA channel use), 2ch available
for external DMA)
Dual/Single Beam
LVDS Pad (VDO, HSYNC)
Support A4 600 dpi, multi-pass color.
Dual/Single Beam
LVDS Pad (VDO, HSYNC)
Support A3 1200 dpi, multi-pass color.
5 Channels (Channel 0 supports DMA/interrupt Operation)
6 External Interrupts, 26 Internal Interrupts
6 System Timers
300/400/600/1200 dpi CIS/CCD image sensor interface
Color/Mono grey image, Binary image scan support
600 dpi Color/Mono Copy support
Image processing for High-End MFP, Digital Copier
MH/MR/MMR CODEC function for fax
Scan image: (max) A4 1200 dpi pixel processing
Copy image: (max) A4 600 dpi pixel processing
8/16 Bits, H/W ECC Generation
Auto Boot Mode (using internal SRAM, 4 KB)
10M/100 Mbps
Full IEEE 802.3 compatibility
Graphic Execution Unit
Fully Hardware Rotator/Scaler/Halftoner support
LSU Interface unit, contained APC function.
Step Motor: 4 Phase
PWM: 8 Channels
ADC: 8 Channels
BLDC clock support.
DAC (2 ea)
Theory of Operation
2-25