2.2.2
SRM Console Power-Up Display
At the completion of SROM power-up, the primary CPU transfers con-
trol to the SRM console program, described in Section 2.3. The console
program continues the system initialization. Failures are reported to
the console terminal through the power-up screen and a console event
log.
Example 2–2 SRM Power-Up Display
OpenVMS PALcode V1.88-28, Tru64 UNIX PALcode V1.83-24
starting console on CPU 0
initialized idle PCB
initializing semaphores
initializing heap
initial heap 240c0
memory low limit = 1e6000
heap = 240c0, 17fc0
initializing driver structures
initializing idle process PID
initializing file system
initializing timer data structures
lowering IPL
CPU 0 speed is 1000 MHz
create dead_eater
create poll
create timer
create powerup
access NVRAM
4096 MB of System Memory
Testing Memory
...
probe I/O subsystem
Hose 0 - PCI bus running at 33Mhz
entering idle loop
probing hose 0, PCI
probing PCI-to-ISA bridge, bus 1
probing PCI-to-PCI bridge, bus 2
bus 0, slot 8 -- pka -- NCR 53C895
bus 0, slot 9 -- eia -- DE600-AA
bus 2, slot 0 -- pkb -- NCR 53C875
bus 2, slot 1 -- pkc -- NCR 53C875
bus 2, slot 2 -- ewa -- DE500-AA Network Controller
bus 0, slot 16 -- dqa -- Acer Labs M1543C IDE
bus 0, slot 16 -- dqb -- Acer Labs M1543C IDE
Hose 1 - PCI bus running at 66Mhz
probing hose 1, PCI
bus 0, slot 2 -- vga -- 3Dlabs OXYGEN VX1
Hose 2 - AGP bus
2-6
ES45 Owner's Guide
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