IBM PPC750FX User Manual page 86

Evaluation Board Manual
PPC750FX Evaluation Board
ldev_adr[8..3] = lpm_ff_component.q[7..2];
-- latched control signals
ldevR_W_n = lpm_ff_component.q[1]; -- read or write cycle
lboot_cs_n = lpm_ff_component.q[0] # cstiming_n; -- on board flash bank 0
-- all accesses to PLD registers are assumed to be 8-bit hw wise.
--***********************************************************************
-- Register0, Read only
PLDversion[7..0] = B"00011000"; -- "18"
-- Register4, Read only
BoardRev[7..0] = B"00000010"; -- "02"
-- board rev 02 = Argan 2.
--***********************************************************************
-- Register1, Read with clear (must write prior to each read)
Register1.enable = Register1_sel & !ldevR_W_n;
Register1.aclr = !sysreset_n;
Register1.clock = we_n0;
Register1.data[5] = ATX_OK_N;--
Register1.data[4] = switch_b;-- spare switch B
Register1.data[3] = switch_a;-- spare switch A
Register1.data[2] = target/host_n; -- PCI switch
Register1.data[1] = flash_n/sram_sel; -- Flash/SRAM switch
Register1.data[0] = bootsmall_n; -- Boot switch
-- Register2, Write/Read, use to drive 3 leds, SMI0, SMI1, TBEN, MCP0, MCP1
Register2.enable = Register2_sel & !ldevR_W_n;
Register2.aclr = !sysreset_n; -- active sysreset_n inverted = 1 here, clears the output
Register2.clock = we_n0;
Register2.data[7..0] = dev_ad[7..0];
led2_node
led1_node
led0_node
led2 = tri(gnd,led2_node); -- tri (signal,oe)
led1 = tri(gnd,led1_node); -- tri (signal,oe)
led0 = tri(gnd,led0_node); -- tri (signal,oe)
cpu0_smi_n_node= !Register2.q[3]; --
cpu1_smi_n_node= !Register2.q[4]; --
cpu_tben_node
cpu_mcp0_node = !Register2.q[6]; --
cpu_mcp1_node = !Register2.q[7]; --
CPLD Programming
Page 86 of 115
= !Register2.q[2]; -- sysreset turns on led (changed Ver 07)
= !Register2.q[1]; -- sysreset turns on led
= !Register2.q[0]; -- sysreset turns on led
= !Register2.q[5]; --
Preliminary
750FXebm_ch11.fm
June 10, 2003