Device Bank 3 Parameters (Fram); Table 4-5. Device Bank 3 Parameters = 0X8D891445 - IBM PPC750FX User Manual

Preliminary

4.2.4 Device Bank 3 Parameters (FRAM)

Table 4-5. Device Bank 3 Parameters = 0x8D891445

Field
TurnOff
Acc2First
Acc2Next
ALE2Wr
WrLow
WrHigh
DevWidth
TurnOffExt
Acc2FirstExt
Acc2NextExt
ALE2WrExt
WrLowExt
WrHighExt
BadrSkew
DPEn
Reserved
750FXebm_ch4.fm
June 10, 2003
Value (bin)
Number of Sysclk cycles that the system controller does not drive the
101
address/data bus after completion of a device read
Number of Sysclk cycles from the de-assertion of ALE to the cycle that the
1000
first read data is sampled
Number of Sysclk cycles in a burst read access between the cycle that
010
samples data N to the cycle that samples data N+1
010 Number of Sysclk cycles from ALE de-assertion to the assertion of Wr[0]
100 Number of Sysclk cycles that Wr[0] is active
Number of Sysclk cycles between data beats of a burst write that Wr[0] is
100
held in-active. BAdr and data are held valid for WrHigh-1 cycles
00 Device width of 8 bits
0 TurnOff extension (most significant bit)
1 Acc2First extension (most significant bit)
1 Acc2Next extension (most significant bit)
0 ALE2Wr extension (most significant bit)
1 WrLow extension (most significant bit)
1 WrHigh extension (most significant bit)
00 Number of Sysclk cycles from when BAdr changes to the read of the data
0 Parity Disabled
1
Evaluation Board Manual
PPC750FX Evaluation Board
Comment
Programming the System Controller
Page 35 of 115