Top Level Block Diagram 2 - IBM PPC750FX User Manual

Evaluation Board Manual
PPC750FX Evaluation Board

11.1.2.2 Top Level Block Diagram 2

pld25mhz
rw_hreset
rw_sreset
rw_trst
mpp_reset_2ms_n
mpp0_hreset_n
mpp0_sreset_n
mpp1_hreset_n
mpp1_sreset_n
mpp_reset_out_n
initact
powergood
target/host_n
serial_eeprom
cpufan_ok_n
ignore_fans_n
mpp_block_n
atx_ok_n
pld25mhz
mpp_reset_out_n
mpp_block_n
pwrgd
dev_adr0
sysreset_n
cpu0_chkstop_n
cpu1_chkstop_n
CPLD Programming
Page 78 of 115
reset_block
25Mclk
rw_hreset
rw_sreset cpu0_hreset_n
rw_trst cpu0_sreset_n
mpp_reset_2ms_n cpu1_hreset_n
mpp0_hreset_n cpu1_sreset_n
mpp0_sreset_n
mpp1_hreset_n
mpp1_sreset_n
mpp_reset_out_n
initact
pgd
target/host_n
serial_eeprom
cpufan_ok_n
ignore_fans_n
mpp_block_n
ATX_OK_N
inst5
misc
pld25mhz mpp_reset_2ms_n
mpp_reset_out_n
mpp_block_n
pwrgd
dev_adr0
sysreset_n
cpu0_chkstop_n
cpu1_chkstop_n
inst3
pci_reset_n
pci_reset_n
sysreset_n
sysreset_n
cpu0_hreset_n
cpu0_sreset_n
cpu1_hreset_n
cpu1_sreset_n
cpu_trst_n
cpu_trst_n
NOFAN_N
nofan_n
sloclk
sloclk
led_red_n
led_red_n
sysreset
sysreset
del_powergood
serial_eeprom
jtag_chkstop_n
Preliminary
mpp_reset_2ms_n
powergood
serial_eeprom
jtag_chkstop_n
750FXebm_ch11.fm
June 10, 2003