System Controller Initialization; Table 6-6. System Controller Initilization-U17 - IBM PPC750FX User Manual

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Evaluation Board Manual
PPC750FX Evaluation Board

6.5 System Controller Initialization

Two 8-position DIP switches at location U17 and U24 provide initilization settings for the system controller.
Table 6-6. System Controller Initilization—U17
Switch No.
Signal
1
DEV_AD0
2:3
DEV_AD2:DEV_AD3
4
DEV_AD5
5
DEV_AD8
6
DEV_AD15
7
DEV_AD16
8
DEV_AD18
Switches
Page 42 of 115
Default Setting
ON = MV64360 Serial ROM initialization disabled
ON
OFF = MV64360 Serial ROM initialization enabled
Specifies the two least significant bits of the 7 bit IIC address of the Serial
ROM the MV64360 can use for initialization.
ON:ON = address 0b1010000 (Serial EEPROM U36)
ON:ON
ON:OFF = reserved
OFF:ON = address 0b1010001 (Serial EEPROM U55)
OFF:OFF = reserved
ON = MV64360 register base address is 0x14000000
OFF
OFF = MV64360 register base address is 0xF1000000
ON = MV64360 CPU Pads Calibration Disabled
OFF
OFF = MV64360 CPU Pads Calibration Enabled
ON = boot from 8 bit socketed Flash BOOTSMALL_N
ON
OFF = boot from 32 bit Flash
ON = MV64360 PCI retry disabled
OFF
OFF = MV64360 PCI retry enabled
ON = DDR-SDRAM clock is running at a higher frequency than the
MV64360 core clock
OFF
OFF = DDR-SDRAM clock is running at the same frequency as the
MV64360 core clock
Description (0 = ON = closed, 1 = OFF = open)
Preliminary
750FXebm_ch6.fm
June 10, 2003

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