IBM PPC750FX User Manual page 82

Evaluation Board Manual
PPC750FX Evaluation Board
del_nvramcs.data[3] = del_nvramcs.q[2];
del_nvramcs.data[4] = del_nvramcs.q[3];
del_nvramcs.data[5] = del_nvramcs.q[4];
del_nvramcs.data[6] = del_nvramcs.q[5];
del_nvramcs.data[7] = del_nvramcs.q[6];
del_nvramcs.data[8] = del_nvramcs.q[7];
del_nvramcs.data[9] = del_nvramcs.q[8];
nvram_cs_n = del_nvramcs.q[4] # (!del_nvramcs.q[9] & !writeNVRAM_n) # nvram_burst_cs_n;
!WriteNVRAM_n =!CSTiming_n & !LDevR_W_n;
!uart_cs_n = !lcs_n[2] & !CSTiming_n;
-- LBOOTCS_N, Boot area and aboveboot area
abovebootarea
bootarea
hiarea
loarea
-- Chip select 0, upperarea and lowerarea
toparea
botarea
upperarea
lowerarea
FLASH/SRAM/BIG = (!flash_n/sram_sel & !bootsmall_n); -- boot from small flash
BIG/FLASH/SRAM = (!flash_n/sram_sel & bootsmall_n); -- boot BIG, flash at top of CS0
SRAM/FLASH/BIG = ( flash_n/sram_sel & !bootsmall_n); -- boot from SRAM
BIG/SRAM/FLASH = ( flash_n/sram_sel & bootsmall_n); -- boot BIG, SRAM at top of CS0
test = small_flash_hi_cs_n; -- for debug only
!small_flash_hi_cs_n = (!CSTiming_n &
!small_flash_lo_cs_n = (!CSTiming_n &
# (BIG/FLASH/SRAM & botarea)
!sram_hi_cs_n
CPLD Programming
Page 82 of 115
= (!lbootcs_n & ldev_addr[20] & ldev_addr[19]);
= (!lbootcs_n & ldev_addr[20] & !ldev_addr[19]);
= (!lbootcs_n & !ldev_addr[20] & ldev_addr[19]);
= (!lbootcs_n & !ldev_addr[20] & !ldev_addr[19]);
= (!lcs_n[0] & ldev_addr[20] & ldev_addr[19]);
= (!lcs_n[0] & ldev_addr[20] & !ldev_addr[19]);
= (!lcs_n[0] & !ldev_addr[20] & ldev_addr[19]);
= (!lcs_n[0] & !ldev_addr[20] & !ldev_addr[19]);
((FLASH/SRAM/BIG & abovebootarea)
# (BIG/FLASH/SRAM & toparea)
# (SRAM/FLASH/BIG & hiarea)
# (BIG/SRAM/FLASH & upperarea)));
((FLASH/SRAM/BIG & bootarea)
# (SRAM/FLASH/BIG & loarea)
# (BIG/SRAM/FLASH & lowerarea)));
= (!CSTiming_n &
((FLASH/SRAM/BIG & hiarea)
# (BIG/FLASH/SRAM & upperarea)
# (SRAM/FLASH/BIG & abovebootarea)
# (BIG/SRAM/FLASH & toparea)));
Preliminary
750FXebm_ch11.fm
June 10, 2003