Socket Power Limit Performance Status Read; Socket Power-Performance Scalability Read; Socket Performance Indication Read; Socket Power Limit Performance Data - Intel BX80619I73820 Design Manual

7.1.4.6

Socket Power Limit Performance Status Read

This service allows the PECI host to assess the performance impact of the currently
active power limiting modes. The read return data contains the total amount of time for
which the entire processor package has been operating in a power state that is lower
than what the operating system originally requested. This information is tracked by a
32-bit counter that wraps around. The unit for time is determined as per the Package
Power SKU Unit settings described in
Figure 7-34. Socket Power Limit Performance Data
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7.1.4.7

Socket Power-Performance Scalability Read

This feature allows the PECI host to access time-averaged processor package power-
performance ratio information at the current workload and operating point. This is
typically used to maximize overall platform performance-power ratios by appropriate
budgeting between multiple packages.
Figure 7-35. Socket Power-Performance Scalability Data
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7.1.4.8

Socket Performance Indication Read

This read returns information on the total number of retired instructions and is
monitored by a 32-bit counter. It may be used in conjunction with the 'Accumulated
Run Time Read' described in
instructions per time unit. This feature is typically used for power budgeting through
appropriate distribution of power across racks of heterogeneous platforms. Note the
following equation for calculation for the actual number of retried instructions.
Number of retried instructions = Socket Performance Indication Data * 128
Figure 7-36. Socket Performance Indication Data
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Section
Accumulated CPU Throttle Time
Accumulated CPU Throttle Time
CPU Socket Power-Performance Ratio
Processor Power-Performance Ratio Data
Section 7.1.2.7.5

Socket Performance Indication Data

Socket Performance Indication
7.1.2.7.2.
to track the number of retired
Thermal/Mechanical Specifications and Design Guide
PECI Interface
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