Package Temperature Read Data; Temperature Target Read - Intel BX80619I73820 Design Manual

Core i7 extreme edition processor family for the lga2011-0 socket
Table of Contents

Advertisement

7.1.2.7.6
Package Temperature Read
This read returns the maximum processor die temperature in 16-bit PECI format. The
upper 16 bits of the response data are reserved.
Figure 7-26. Package Temperature Read Data
31
RESERVED
7.1.2.7.7

Temperature Target Read

The Temperature Target Read allows the PECI host to access the maximum processor
junction temperature (T
value at which the processor thermal control circuit activates. The T
from processor part to part to reflect manufacturing process variations. The
Temperature Target read also returns the processor T
returned in standard PECI temperature format and represents the threshold
temperature used by the thermal management system for fan speed control.
Figure 7-27. Temperature Target Read
31
RESERVED
7.1.2.7.8
Package Thermal Status Read / Clear
The Thermal Status Read provides information on package level thermal status. Data
includes:
• Thermal Control Circuit (TCC) activation
• Bidirectional PROCHOT_N signal assertion
• Critical Temperature
Both status and sticky log bits are managed in this status word. All sticky log bits are
set upon a rising edge of the associated status bit and the log bits are cleared only by
Thermal Status reads or a processor reset. A read of the Thermal Status word always
includes a log bit clear mask that allows the host to clear any or all of the log bits that
it is interested in tracking.
A bit set to '0' in the log bit clear mask will result in clearing the associated log bit. If a
mask bit is set to '0' and that bit is not a legal mask, a failing completion code will be
returned. A bit set to '1' is ignored and results in no change to any sticky log bits. For
example, to clear the TCC Activation Log bit and retain all other log bits, the Thermal
Status Read should send a mask of 0xFFFFFFFD.
74
16
15
Sign
Bit
PACKAGE_TEMPERATURE MSR
) in degrees Celsius. This is also the default temperature
jmax
24
23
Processor Tjmax
TEMPERATURE_TARGET MSR
14
6
PECI Temperature
(Integer Value)
CONTROL
16
15
T
CONTROL
Thermal/Mechanical Specifications and Design Guide
PECI Interface
5
0
PECI Temperature
(Fractional Value)
value may vary
jmax
value. T
is
CONTROL
8
7
0
RESERVED

Advertisement

Table of Contents
loading

This manual is also suitable for:

Core i7-3960xCore i7-3970xCore i7-3930kCore i7-3820

Table of Contents