Intel BX80562Q6600 - Core 2 Quad 2.4 GHz Processor Specification page 43

Errata
Implication: None identified. Although the EFLAGS value saved may contain incorrect
arithmetic flag values, Intel has not identified software that is affected by this
erratum. This erratum will have no further effects once the original
instruction is restarted because the instruction will produce the same results
as if it had initially completed without a page fault.
Workaround: If the page fault handler inspects the arithmetic portion of the saved EFLAGS
value, then system software should perform a synchronized paging structure
modification and TLB invalidation.
For the steppings affected, see the Summary Tables of Changes.
Status:
AK63. LBR, BTS, BTM May Report a Wrong Address when an
Exception/Interrupt Occurs in 64-bit Mode
An exception/interrupt event should be transparent to the LBR (Last Branch
Problem:
Record), BTS (Branch Trace Store) and BTM (Branch Trace Message)
mechanisms. However, during a specific boundary condition where the
exception/interrupt occurs right after the execution of an instruction at the
lower canonical boundary (0x00007FFFFFFFFFFF) in 64-bit mode, the LBR
return registers will save a wrong return address with bits 63 to 48
incorrectly sign extended to all 1s. Subsequent BTS and BTM operations
which report the LBR will also be incorrect.
Implication: LBR, BTS and BTM may report incorrect information in the event of an
exception/interrupt.
Workaround: None identified.
For the steppings affected, see the Summary Tables of Changes.
Status:
AK64. Returning to Real Mode from SMM with EFLAGS.VM Set May Result in
Unpredictable System Behavior
Returning back from SMM mode into real mode while EFLAGS.VM is set in
Problem:
SMRAM may result in unpredictable system behavior.
Implication: If SMM software changes the values of the EFLAGS.VM in SMRAM, it may
result in unpredictable system behavior. Intel has not observed this behavior
in commercially available software.
Workaround: SMM software should not change the value of EFLAGS.VM in SMRAM.
For the steppings affected, see the Summary Tables of Changes.
Status:
AK65. A Thermal Interrupt is Not Generated when the Current Temperature
is Invalid
When the DTS (Digital Thermal Sensor) crosses one of its programmed
Problem:
thresholds it generates an interrupt and logs the event
(IA32_THERM_STATUS MSR (019Ch) bits [9,7]). Due to this erratum, if the
DTS reaches an invalid temperature (as indicated IA32_THERM_STATUS MSR
Intel ® Core™2 Extreme Quad-Core Processor QX6000
Intel ® Core™2 Quad Processor Q6000
Specification Update
Δ Sequence and
Δ Sequence
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