EUROCOM D47EV Service Manual page 96

Schematic Diagrams
M661-3 & CRT Out 3 of 4
Sheet 7 of 42
M661-3
+1.8VS
FCM1608K121
& CRT Out
1
C552
3 of 4
10U/10V
+3VS
C123
10U/10V
+3VS
C527
10U/10V
30 R
30 G
30 B
B - 8 M661-3 & CRT Out 3 of 4 (71-D40U0-D04A)
BGA1C
ZCLK0
AL6
4 ZCLK0
ZCLK
ZUREQ
13 ZUREQ AL4
ZUREQ
ZDREQ
AK5
13 ZDREQ
ZDREQ
ZSTB0 AJ2
13 ZSTB0
ZSTB0
ZSTB#0 AJ3
13 ZSTB#0
ZSTB0#
ZSTB1
AE3
13 ZSTB1
ZSTB1
ZSTB#1
AF2
13 ZSTB#1
ZSTB1#
ZAD[0..16]
13 ZAD[0..16]
ZAD0
AH5
ZAD1 ZAD0
AK2
ZAD2 ZAD1
AJ4
ZAD3 ZAD2
AJ6
ZAD4 ZAD3
AH2
ZAD5 ZAD4
AH4
ZAD6 ZAD5
AG3
ZAD7 ZAD6
AG6
ZAD8 ZAD7
AF4
ZAD9 ZAD8
AG2
ZAD10 ZAD9
+1.8VS
AF5
ZAD11 ZAD10
AG4
ZAD12 ZAD11
AD2
ZAD13 ZAD12
AE6
ZAD14 ZAD13
R446
AE2
ZAD15 ZAD14
C551 AE4
ZAD16 ZAD15
150
0.1UF AL3
ZAD16
ZVREF
AK4
ZVREF
R447
C550
50 0.1UF
L128
R434 56
ZCMP_N
2 35.4mA AD5
ZCOMP_N
C528
C526
0.1UF
0.01UF
R428 56
ZCMP_P
AD4
ZCOMP_P
20MIL
N17
L36
FCM1608K121 6.49mA
Z1XAVDD
1 2 AN1
Z1XAVDD
C109 C110
0.01UF
0.1UF
Z1XAVSS
AM2
Z1XAVSS
10MIL
N4
L31
FCM1608K121
7.92mA
Z4XAVDD
1 2 AL2
Z4XAVDD
C94 C95
0.01UF
0.1UF
Z4XAVSS
AL1
Z4XAVSS
10MIL
N3
R
R248 0
661
G
R5 0
B
R9 0
ROUT
R249 0(R) R247 FCM1608K121
GOUT
R4 0(R) R6 FCM1608K121
BOUT
R251 0(R) R3 FCM1608K121
C284 R253 C11 R11 C9 R250
22P 75 22P 75 22P 75
D3 D4 D23
DA204U DA204U DA204U
+3VS
REFCLK0
A15
REFCLK0 4
VOSCI
ROUT
B12
ROUT
B13 GOUT
GOUT
BOUT
A13
BOUT
R277 33(R) HSYNC
A11 Z0801
HSYNC VSYNC
R275 33(R)
B11 Z0802
VSYNC
DDC1CLK
E13 R276 100(R)
VGPIO0 DDC1DATA
C11 R274 100(R)
VGPIO1
CSYNC
D12
CSYNC T
RSYNC
E12
RSYNC T
LSYNC
D11
LSYNC T
INTA#
C10
INTA# 10,13,30
INT#A
PCIRST#
AN2
PCIRST# 10,13,14,20,22,24,30
PCIRST#
PWRGD
AM4
PWRGD 15,29
PWROK
AUXOK
AN3
AUXOK 15,24,27,28
AUXOK
VCOMP C23
E15 0.1UF
VCOMP
VVBWN C24
E14 0.1UF
VVBWN
+1.8VS
L10 84.8mA
DACAVDD
D13 1 2
DACAVDD1
D14 FCM1608K121
DACAVDD2
C22 C305
C21
N1
0.1UF 10U/10V
1UF
DACAVSS
C12
DACAVSS1
C13 20MIL
DACAVSS2
VRSET
D15 R20 130_1%
VRSET
+3VS
L13 7.57mA
10MIL
DCLKAVDD
B15 1 2
DCLKAVDD
FCM1608K121
C25 C17
C26
0.1UF 10U/10V
1UF
C15
DCLKAVSS
+3VS
L78 18.07mA
ECLKAVDD
B14 1 2
ECLKAVDD
FCM1608K121
C313 C304
C314
0.1UF 10U/10V
1UF
ECLKAVSS
C14
ECLKAVSS
10MIL N10
DLLEN#
E10
DLLEN# T
TMODE0
B10
TESTMODE0 T
TMODE1
B9
TESTMODE1 T
TMODE2
C9
TESTMODE2 T
TRAP0
D10
TRAP0 T
TRAP1
F9
TRAP1 T
ENTEST
D9
ENTEST T
D2 F01J2E
C A
+5VS
VJVGA1
CEN/VGA DSUB
FRED_10
1
9
FGRN_10
2
10
FBLU_10
3
11
T
4 FCM1608K121
T L2
MID1_10
12 1
C267 C3 C10 5 FCM1608K121
L67
HS_10
13 1
6 FCM1608K121
22P 22P 22P
L65
VS_10
14 1
7 FCM1608K121
MID3_10
15 L66 1
8
C268 C6 C8 C7
220P 220P 220P 220P
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
NB Hardware Trap Table
0 1 Default
DLLEN# enable PLL disable PLL 0
DRAM_SEL SDR DDR 1(DDR)
TRAP0 normal NB debug mode 0
TRAP1 TV selection, NTSC/PAL(0/1) 0
CSYNC enable VB 0
RSYNC enable VGA interface 1
LSYNC enable panel link 0
+3VS
R278 4.7K
RSYNC
R279 4.7K
ENTEST
C549 0.1UF
PWRGD
C598 0.1UF
AUXOK
+5VS +5VS
+3VS
D8 D10
DA221(R) DA221(R)
Q24
G
2N7002
R265 33 S D HSYNC
30 HSY
R272 33 S D VSYNC
30 VSY
G
Q23
2N7002
+3VS
+3VS +3VS +5VS
+3VS
R271 R273 R257 R18
4.7K
4.7K 2.2K 2.2K
Q22
G
2N7002
R270
33 S D DDC1DATA
30 VGADDCDATA
R21
33 S D DDC1CLK
30 VGADDCCLK
G
Q25
+5VS
2N7002
+3VS
R258 R256
4.7K(R) 4.7K(R)
DDC1DATA
2
HSYNC
2
VSYNC
2
DDC1CLK
2
embedded pull-low
(30~50K Ohm)
yes
yes
yes