Private Management I C Buses; Watchdog Timer; 5.10 Bmc Internal Timestamp Clock; Bmc Clock Initialization - Intel X38ML - Server Board Motherboard Technical Manual

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Platform Management
5.8
Private Management I
The BMC controls multiple private I
External agents must use the BMC's Master Write/Read I
communication with a device on any of these buses. Only FRU devices are accessible in this
manner. Sensor devices should not be directly accessed by BMC clients.
5.9

Watchdog Timer

The BMC implements a fully IPMI 2.0-compatible watchdog timer. See the IPMI 2.0
specification. A watchdog pre-timeout interrupt signal assertion is not supported.

5.10 BMC Internal Timestamp Clock

The BMC maintains a 4-byte internal timestamp clock that subsystems, such as the SEL, use.
The timestamp value is derived from an RTC element internal to the BMC.
This internal timestamp clock is read and set using the Get SEL Time and Set SEL Time
commands, respectively. You can also use the Get SDR Time command to read the timestamp
clock. The IPMI 2.0 specification specifies the commands and the IPMI time format.
5.10.1

BMC Clock Initialization

During system initialization the BMC cannot guarantee the validity of its internal timestamp, so it
resets its clock counter to zero. The BMC attempts to retrieve the current time from an internal
battery-backed RTC element. If the RTC time is in the pre-init range of 0 to 0x20000000, then
the BMC ignores it and continues counting from zero, and any SEL events have pre-init
timestamps relative to the approximate time of the BMC initialization.
Whenever the BMC receives the Set SEL Time command, it updates the integrated RTC value.
This helps ensure the BMC internal clock maintains synchronization with the system clock
across BMC initializations. Using the Set SEL Time command to force the BMC to a pre-init
timestamp causes the RTC to be updated with the same value. Unless the Set SEL Time
command is sent with a valid time before the next BMC initialization, the BMC ignores the pre-
init time stored in the RTC.
5.10.2

System Clock Synchronization

The BMC does not have direct access to the system clock used by BIOS and the operating
system. The BIOS must send the Set SEL Time command with the current system time to the
BMC during the system Power-on Self-Test (POST). Synchronization during very early POST is
preferred, so any SEL entries recorded during system boot have an accurate time stamp.
If the time is modified through an operating system interface, then the BMC's time is not
synchronized until the next system reboot.
64
C Buses
2
2
C buses. The BMC is the sole master on these buses.
Intel order number E15331-006
Intel® Server Board X38ML
2
C command if they require direct
Revision 1.3

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