Intel X38ML - Server Board Motherboard Technical Manual page 23

Technical product specification
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Intel® Server Board X38ML
3.2.2.7
Real Time Clock (RTC)
®
The Intel
ICH9 contains a Motorola MS146818A functionally compatible real-time clock with
two 128-byte banks of battery-backed RAM. The RTC performs two key functions on the Intel
Server Board XM38ML:
Keeps track of the time of day
Stores system configuration data even when the system is powered down
The RTC operates on a 32.768 KHz crystal and a 3 V lithium battery.
3.2.2.8
GPIO
®
The Intel
ICH9 contains 61 general purpose inputs/outputs. The General Purpose Inputs and
Outputs (GPIO) are provided for custom system design.
3.2.2.9
Enhanced Power Management
®
The Intel
ICH9R supports the Advanced Configuration and Power Interface, Version 2.0 (ACPI)
that provides power and thermal management. The Intel
Manageability Engine Power Management Support for new wake events from the MCH
Management Engine.
3.2.2.10
System Management Interface
®
The Intel
ICH9R provides a SMBus 2.0 compliant Host Controller that allows the processor to
communicate with SMBus slaves. This interface is compatible with most I
ICH9R also supports slave functionality. The SMBus logic exists in Device 31: Function 3
configuration space.
3.2.2.11
Serial Peripheral Interface (SPI)
The Serial Peripheral Interface (SPI) is a 4-pin interface that provides a potentially lower-cost
alternative for the system flash versus the Firmware Hub on the LPC Bus. The Intel
supports two SPI flash components using two separate chip select pins. Each component may
be up to 16 MB and operate in SPI Fast Read Instructions and frequencies of 20 MHZ or 33
MHz. The SPI Interface has the following features:
Clock (CLK)
Master Out Slave In (MOSI)
Master In Slave Out (MISO)
Chip Select (CS#)
Communication on the SPI is done with a Master – Slave protocol.
The SPI flash can operate in two operational modes: descriptor and non-descriptor. When
operating in non-descriptor mode, the SPI Flash only supports the BIOS through register
access.
When used in descriptor mode, the ICH9 allows a single SPI flash device to store the system
®
BIOS, Intel
AMT Firmware, and Gigabit Ethernet EEPROM information.
Revision 1.3
Intel order number E15331-006
Functional Architecture
®
ICH9R also supports the
2
C devices. The
®
®
ICH9
11

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