Omron CP1L CPU UNIT - 06-2007 Operation Manual page 352

Cp1l cpu unit
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Interrupt Functions
Interrupt Task Priority
Note
Duplicate Processing
in Cyclic and Interrupt
Tasks
2. Right-click NewProgram2 (unassigned) and select Properties from the
pop-up menu to display the Program Properties Window.
3. Set the Task type in the Program Properties Window.
In this example, interrupt task 140 was allocated to NewProgram2.
If you click the X Button in the upper-right corner of the window, you can cre-
ate the program that will be executed as interrupt task 140.
The programs allocated to each task are independent and an END(001)
instruction must be input at the end of each program.
The input interrupts (direct mode and counter mode), high-speed counter
interrupts, scheduled interrupts, and external interrupts all have the same pri-
ority. If interrupt task A (an input interrupt, for example) is being executed
when interrupt task B (a scheduled interrupt, for example) is called, task A
processing will not be interrupted. Task B processing will be started when task
A is completed.
If two different types of interrupt occur simultaneously, they are executed in
the following order:
Input interrupt
(direct mode or
>
counter mode)
If two of the same type interrupt occur simultaneously, the task with the lower
interrupt task number is executed first.
If a user program is likely to generate multiple interrupts simultaneously, the
interrupt tasks will be executed in the order shown above, so it may take some
time from the occurrence of the interrupt condition to the actual execution of
the corresponding interrupt task. In particular, it is possible that scheduled
interrupts will not be executed in the preset time, so the program must be
designed to avoid interrupt conflicts if necessary.
If a memory address is processed both by a cyclic task and an interrupt task,
an interrupt mask must be set to disable interrupts.
High-speed
Scheduled
counter inter-
>
interrupt
rupt
Section 6-1
319

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