Supermicro X13DEG-PVC User Manual page 110

Super X13DEG-PVC User's Manual
ADDDC Sparing (Available when populating 1Rx4, 2Rx4, and 4Rx4 DIMM)
Select Enabled for Adaptive Double Device Data Correction (ADDDC) support, which will not only provide memory error
checking and correction but will also prevent the system from issuing a performance penalty before a device fails. Please
note that virtual lockstep mode will only start to work for ADDDC after a faulty DRAM module is spared. The options are
Disabled and Enabled.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected in a memory module
and send the corrections to the requestor (the original source). When this feature is set to Enable, the IO hub will read
and write back one cache line every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are Disabled and Enable at End
of POST. (POST is the abbreviation for Power_On Self Test.)
DDR PPR Type
Post Package Repair (PPR) is a new feature available for the DDR4/DDR5 technology. PPR provides additional spare
capacity within a DDR4/DDR5 DRAM module that is used to replace faulty cell areas detected during system boot. PPR
offers two types of memory repairs. Soft Post Package Repair (sPPR) provides a quick, temporary fix on a raw element in
a bank group of a DDR4/DDR5 DRAM device, while hard Post Package Repair (hPPR) will take a longer time to provide
a permanent repair on a raw element. The options are PPR Disabled, Hard PPR, and Soft PPR.
Enhanced PPR
Use this feature to set advanced memory test for PPR enhancement. Select Enabled to always execute for every boot.
Select Once to execute only one time. The options are Disabled, Enabled, and Once.
Memory PFA Support (Available when the DCMS key is activated)
Select Enabled to enable memory Predictive Failure Analysis (PFA) support. PFA can be used to avoid uncorrectable
faults in the same memory page. The options are Disabled and Enabled.
IIO Configuration
CPU1 Configuration / CPU2 Configuration / CPU3 Configuration / CPU4

Configuration
IOU0 (IIO PCIe Port 1)
This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the
user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16 .
IOU1 (IIO PCIe Port 2)
This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the
user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
IOU2 (IIO PCIe Port 3)
This feature is CPU-dependent. Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the
user. The options are Auto, x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
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