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Flush Timeout
Use this feature to set the timeout setting when the data in the CPU cache memory should be flushed by the applications
to persistent memory during power-off. The options are Auto and Manual.
Flush Timeout Value (Available when "Flush Timeout" is set to Manual)
Use this feature to enter the flush timeout value. The default value is FFF.
DDR 2X Refresh Enable
Select Enable for memory 2X refresh support to enhance memory performance. The options are Auto, Disable, and Enable.
Memory Topology
This feature displays the information of onboard memory modules as detected by the BIOS, for example:
P1-DIMMA1: 4400MT/s Micron DRx4 64GB RDIMM ~ P2-DIMMH2: 4400MT/s Micron DRx4 64GB RDIMM
Memory RAS Configuration
Use this submenu to configure the following Memory Reliability_Availability_Serviceability (RAS) settings.
Mirror Mode (Available when "ADDDC Sparing" is set to Disabled)
Use this feature to configure the mirror mode settings for all 1LM/2LM memory modules in the system which will create
a duplicate copy of data stored in the memory to increase memory security, but it will reduce the memory capacity into
half. The options are Disabled, Full Mirror Mode, and Partial Mirror Mode.
UEFI ARM Mirror (Available when "ADDDC Sparing" is set to Disabled and
"Mirror Mode" is set to Disabled)
If this feature is set to Enable, mirror mode configuration settings for UEFI-based Address Range memory will be enabled
upon system boot. This will create a duplicate copy of data stored in the memory to increase memory security, but it will
reduce the memory capacity into half. The options are Disabled and Enabled.
ARM Mirror Percentage (Available when "UEFI ARM Mirror" is set to Enabled)
Use this feature to set the percentage of memory space to be used for UEFI ARM mirroring for memory security enhance-
ment. The default setting is 0.
Correctable Error Threshold
Use this feature to specify the threshold value for correctable memory-error logging, which sets a limit on the maximum
number of events that can be logged in the memory error log at a given time. The default setting is 512.
Leaky Bucket Low Bit
Use this feature to set the Low Bit value for the Leaky Bucket algorithm which is used to check the data transmissions
between CPU sockets and the memory controller. The default setting is 11.
Leaky Bucket High Bit
Use this feature to set the High Bit value for the Leaky Bucket algorithm which is used to check the data transmissions
between CPU sockets and the memory controller. The default setting is 14.
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Chapter 4: UEFI BIOS
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