Keysight E4428C ESG RF Programming Manual page 199

Table 4-9 Data Questionable Condition Register Bits
Bit Description
0, 1, 2 Unused. These bits are always set to 0.
3 Power (summary). This is a summary bit taken from the QUEStionable:POWer register. A 1 in this bit position
indicates that one of the following may have happened: The ALC (Automatic Leveling Control) is unable to
maintain a leveled RF output power (i.e., ALC is UNLEVELED), the reverse power protection circuit has been
tripped. See the
4 N5161A/62A/81A/82A/83A: ALC Heater Detector (COLD). A 1 in this bit position indicates that the ALC
detector is cold.
E4428C/38C, E8257D/67D, and E8663B: Temperature (OVEN COLD). A 1 in this bit position indicates that
the internal reference oscillator (reference oven) is cold.
5
Frequency (summary). This is a summary bit taken from the QUEStionable:FREQuency register. A 1 in this bit
position indicates that one of the following may have happened: synthesizer PLL unlocked, 10 MHz reference
VCO PLL unlocked, 1 GHz reference unlocked, sampler, YO loop unlocked or baseband 1 unlocked. For more
information, see the
6 Unused. This bit is always set to 0.
7 Modulation (summary). This is a summary bit taken from the QUEStionable:MODulation register. A 1 in this
bit position indicates that one of the following may have happened: modulation source 1 underrange,
modulation source 1 overrange, modulation source 2 underrange, modulation source 2 overrange, or modulation
uncalibrated. See the
information.
ab Calibration (summary). This is a summary bit taken from the QUEStionable:CALibration register. A 1 in this
8
bit position indicates that one of the following may have happened: an error has occurred in the DCFM/DCΦM
zero calibration, or an error has occurred in the I/Q calibration. See the
Status Group" on page 205
9 Self Test. A 1 in this bit position indicates that a self- test has failed during power- up. Reset this bit by cycling
the signal generator's line power. *CLS will not clear this bit.
10, 11 Unused. These bits are always set to 0.
c BERT (summary). This is a summary bit taken from the QUEStionable:BERT register. A 1 in this bit position
12
indicates that one of the following occurred: no BCH/TCH synchronization, no data change, no clock input,
PRBS not synchronized, demod/DSP unlocked, or demod unleveled. See the
Status Group" on page 209
13, 14 Unused. These bits are always set to 0.
15 Always 0.
a
In the N5162A/82A, this bit applies only to the I/Q calibration. In the N5161A/81A/83A, this bit is unused and always set to 0.
b
In the E8257D, E8663B, and the E8663D, this bit applies only to the DCFM/DCΦM calibration.
c
In the N5161A/81A, N5162A/82A, N5183A, E4428C, E8257D, E8267D, E8663B, and the E8663D, this bit is always set to 0.
Keysight Signal Generators Programming Guide
"Data Questionable Power Status Group" on page 194
"Data Questionable Frequency Status Group" on page 198
"Data Questionable Modulation Status Group" on page 202
for more information.
for more information.
Programming the Status Register System
Status Groups
for more information.
.
for more
"Data Questionable Calibration
"Data Questionable BERT
191