External Conversion Clock With Gate - Advantech PCI-1716 User Manual

3.1.3.2 Streaming Analog Input Acquisition
For a streaming acquisition, the number of samples to be acquired is set to infinite.
The acquisition starts when a start trigger is received and continues until a stop trig-
ger is received as shown in Figure 3.4.
Both the start trigger and the stop trigger can come from a software command or a
hardware signal. If a hardware signal is used, the start (for the start trigger) or the
stop (for the stop trigger) of the acquisition can also be delayed. Refer to the device
specifications for possible signal sources.
3.1.4

External Conversion Clock with Gate

The conversion clock source can be software configured as either internally gener-
ated clock or external source. When using external clock, be sure the clock fre-
quency does not exceed the maximum allowable value of the specifications.
An external gate signal can be used to temporarily mask the external clock. Clock is
effective only when external gate signal is low, and it is masked when external gate
signal is high. This is shown in Figure 3.5.
PCI-1716_Series User Manual
Figure 3.3 Post-trigger acquisition.
Figure 3.4 Streaming acquisition.
Figure 3.5 External conversion clock with gate.
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