Advantech PCI-1710 User Manual
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Advantech PCI-1710 User Manual

Advantech PCI-1710 User Manual

Multifunction das card for pci bus
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  • Page 2 PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are trademarks of International Business Machines Corporation. MS-DOS and Windows are trademarks of Microsoft Corporation.

  • Page 3: Table Of Contents

    Contents Chapter 1: General Information ......1 Introduction ............... 2 Features ..............3 Specifications............. 4 Block Diagram............8 Chapter 2: Installation ..........9 Initial Inspection ............10 Unpacking ............... 10 Installation Instructions ..........11 Chapter 3: Signal Connections ......13 Overview..............
  • Page 4 Control Register............39 Status Register ............40 Clear Interrupt and FIFO ......... 41 4.10 D/A Channel 0 Output ..........42 4.11 D/A Channel 1 Output ..........42 4.12 D/A Reference Control ..........43 4.13 Digital I/O Registers ..........44 4.14 Programmable Timer/Counter Registers ....44 Chapter 5: Calibration..........

  • Page 5: Chapter 1 General Information

    Chapter 1 General Information...

  • Page 6: Features

    The PCI-1710/1710HG is a multifunction DAS card for the PCI bus. Advanced circuit design brings you higher quality and more func- tions, including the five most desired measurement and control functions: 12-bit A/D conversion, D/A conversion, digital input, digital output, and counter/timer. The PCI-1710/1710HG uses a PCI controller to interface the card with the PCI bus.
  • Page 7 The PCI-1710/1710HG provides a programmable counter for generat- ing a pacer trigger for the A/D conversion. The counter chip is an 82C54 or equivalent, which includes three 16-bit counters on a 10 MHz clock. One counter is used as an event counter for counting events coming from the input channels.
  • Page 8 • Channels: 16 single-ended or 8 differential (software programma- ble) • Resolution: 12-bit • On-board FIFO: 4K samples • Conversion time: 8 µs • Input range: (V , software programmable) PCI-1710 PCI-1710HG ±10, ±5, ±2.5, ±1.25, ±10, ±5, ±1, ±0.5, ±0.1, ±0.05, Bipolar ±0.625 ±0.01, ±0.005...
  • Page 9 • Maximum data throughput: PCI-1710: 100 kHz PCI-1710HG: (variable, depending on PGIA settling time) PCI-1710HG Gain Speed 0.5, 1 100 kHz 5, 10 35 kHz 50, 100 7 kHz 500, 1000 770 Hz • Accuracy: (depending on gain) PCI-1710 PCI-1710HG Gain Accuracy Gain...
  • Page 10 • Channels: 2 • Resolution: 12-bit • Relative accuracy: ±1/2 LSB • Gain error: ±1 LSB • Maximum update rate: 100 K samples/s • Slew rate: 10 V/ s • Output range: (software programmable) With internal reference: 0 ~ +5 V, 0 ~ +10 V With external reference: 0 ~ +x V @ -x V (-10 x 10) •...
  • Page 11 • Counter chip: 82C54 or equivalent • Counters: 3 channels, 16 bits, 2 channels are permanently configured as programmable pacers; 1 channel is free for user application • Input, gate: TTL/CMOS compatible • Time base: Channel 1:10 MHz Channel 2:Takes input from output of channel 1 Channel 0:Internal 1 MHz or external clock (10 MHz max.) selected by software.
  • Page 12 Address Decoder A d d r e s s B u s PCI Controller 16-bit Digital Output Data Bus I N T 16-bit Digital Input A/D & D/A Status 12-bit D/A Output 0 Control Logic 12-bit D/A Output 1 CNT0_CLK CNT0_OUT C O U N T E R 10 MHz/10=...

  • Page 13: Chapter 2 Installation

    Chapter 2 Installation...
  • Page 14 Before installing the PCI-1710/1710HG, check the card for visible damage. We have carefully inspected the card both mechanically and electrically before shipment. It should be free of marks and in perfect order upon receipt. As you unpack the PCI-1710/1710HG, check it for signs of shipping damage (damaged box, scratches, dents, etc.).
  • Page 15 The PCI-1710/1710HG can be installed in any PCI slot in the computer. However, refer to the computer user's manual to avoid any mistakes and danger before you follow the installation procedure below: 1. Turn off your computer and any accessories connected to the computer.
  • Page 16 PCI-1751/1710HG User's Manual...

  • Page 17: Chapter 3 Signal Connections

    Chapter 3 Signal Connections...
  • Page 18 Correct signal connections are one of the most important factors in ensuring that your application system is sending and receiving data correctly. A good signal connection can avoid much unnecessary and costly damage to your valuable PC and other hardware devices. This chapter will provide some useful information about how to connect input and output signals to the PCI-1710/1710HG card via the I/O connector.
  • Page 19 AI10 AI11 AI12 AI13 AI14 AI15 AIGND AIGND DA0_REF DA1_REF DA0_OUT DA1_OUT A O G N D A O G N D DI10 DI11 DI12 DI13 DI14 DI15 D G N D D G N D D O 0 D O 1 D O 2 D O 3 D O 4...
  • Page 20 Signal Reference Direction Description Name Analog Input Channels 0 through 15. Each channel pair, AI<i, i+1> (i = 0, 2, 4...14), can be AI<0…15> AIGND Input configured as either two single-ended inputs or one differential input. Analog Input Ground. These pins are the reference points for single-ended measurements and the bias current return point AIGND...
  • Page 21 Signal Name Reference Direction Description Digital Input signals DI<0..15> DGND Input Digital Output signals DO<0..15> DGND Output Digital Ground. This pin supplies the reference for the digital signals at the I/O connector as well as the +5V supply. The DGND three ground references (AIGND, AOGND, and DGND) are connected together on the PCI-1710/1710HG card.
  • Page 22 Signal Reference Direction Description Name Pacer Clock Output - This pin pulses once for each pacer clock when turned on. If A/D PACER conversion is in the pacer trigger mode, users DGND Output _OUT can use this signal as a synchronous signal for other applications.
  • Page 23 The PCI-1710/1710HG card supports either 16 single-ended or 8 differential analog inputs. Input channel configuration is selected by software. Selection by software is more convenient than selection by a slide switch on the card. In the past, if you set one single-ended (or differential) input channel by switch, the other channels also would be single-ended (or differential).
  • Page 24 Internal External Figure 3-2: Single-ended input channel connection The differential input configuration has two signal wires for each channel, and the differential input responds only to voltage differenc- es between High and Low inputs. On the PCI-1710/1710HG card, when all channels are configured to differential input, up to 8 analog channels are available.
  • Page 25 card. With this connection, the PGIA rejects a common-mode voltage between the signal source and the PCI-1710/1710HG ground, shown as V in Figure 3-3. Internal External Figure 3-3: Differential input channel connection - ground reference signal source If a floating signal source is connected to the differential input channel, the signal source may exceed the common-mode signal range of the PGIA, and the PGIA will be saturated with erroneous voltage- readings.
  • Page 26 Internal External Figure 3-4: Differential input channel connection - floating signal source However, this connection has the disadvantage of loading the source down with the series combination (sum) of the two resistors. For r and r for example, if the input impedance r is 1 k , and each of the two resistors is 100 k , then the resistors load down the signal source with 200 k (100 k + 100 k ), resulting in a –0.5% gain error.

  • Page 27: I/O Connector

    The PCI-1710/1710HG card provides two D/A output channels, DA0_OUT and DA1_OUT. Users may use the PCI-1710/1710HG internally provided precision –5V (-10V) reference to generate 0 to +5 V (+10 V) D/A output range. Users also may create D/A output range through external references, DA0_REF and DA1_REF.
  • Page 28 The PCI-1710/1710HG card includes one 82C54 compatible programma- ble timer/counter chip which provides three 16-bit counters connected to a 1 MHz clock, designated as Counter 0, Counter 1 and Counter 2. Counter 0 is an event counter for counting events coming from the input channels.

  • Page 29: Analog Input Connections

    When you use the PCI-1710/1710HG card to acquire outside data, environmental noise can seriously affect the accuracy of your mea- surements if you don’t provide any protection. The following sugges- tions will be helpful when running signal wires between signal sources and the PCI-1710/1710HG card.
  • Page 30 PCI-1710/1710HG User's Manual...

  • Page 31: Chapter 4 Register Structure And Format

    Chapter 4 Register Structure and Format...
  • Page 32 Windows 95/NT operating system. We advise users to program the PCI-1710/1710HG using the 32-bit DLL driver provided by Advantech to avoid the complexity of low-level programming by register. The most important consideration in programming the PCI-1710/ 1710HG card at a register level is to understand the function of the card’s registers.

  • Page 33: Channel Number And A/D Data

    Base Read Address + decimal Channel Number and A/D Data AD11 AD10 Status Register CNT0 ONE/FH IRQEN GATE PACER Chapter 4 Register Structure and Format...
  • Page 34 Base Read Address + decimal Digital Input DI15 DI14 DI13 DI12 DI11 DI10 Counter 0 Counter 1 Counter 2 PCI-1710/1710HG User's Manual...

  • Page 35: Software A/D Trigger

    Base Write Address + decimal Software A/D Trigger A/D Channel Range Setting MUX Control Stop channel Start channel Control Register CNT0 ONE/FH IRQEN GATE PACER Clear Interrupt and FIFO clear FIFO clear interrupt D/A Output Channel 0 DA11 DA10 D/A Output Channel 1 DA11 DA10 Chapter 4 Register Structure and Format...
  • Page 36 Base Write Address + decimal D/A Reference Control DA1_I/E DA1_5/10 DA0_I/E DA0_5/10 Digital Output DO15 DO14 DO13 DO12 DO11 DO10 Counter 0 Counter 1 Counter 2 Counter Control PCI-1710/1710HG User's Manual...
  • Page 37 These two bytes, BASE+0 and BASE+1, hold the result of A/D conversion data. The 12 bits of data from the A/D conversion are stored in BASE+1 bit 3 to bit 0 and BASE+0 bit 7 to bit 0. BASE+1 bit 7 to bit 4 hold the source A/D channel number. Read Channel Number and A/D Data Bit #...
  • Page 38 Each A/D channel has its own input range, controlled by a range code stored in the on-board RAM. If you want to change the range code for a given channel, select the channel as the start channel and the stop channel in the registers of BASE+4 and BASE+5 (described in the next section), and then write the range code to BASE+2 bit 0 to bit 2 and bit 4.
  • Page 39 The following table lists the gain codes for the PCI-1710: PCI-1710 Gain Code Gain Input Range(V) -5 to +5 -2.5 to +2.5 -1.25 to +1.25 -0.625 to +0.625 -10 to 10 0 to 10 0 to 5 0 to 2.5 0 to 1.25 Chapter 4 Register Structure and Format...
  • Page 40 PCI-1710HG Gain Code Gain Input Range(V) -5 to +5 -0.5 to +0.5 -0.05 to +0.05 1000 -0.005 to +0.005 -10 to +10 -1 to +1 -0.1 to +0.1 -0.01 to +0.01 0 to 10 0 to 1 0 to 0.1 1000 0 to 0.01 PCI-1710/1710HG User's Manual...

  • Page 41: Mux Control

    Write MUX Control Bit # BASE+5 BASE+4 CL3 ~ CL0 Start Scan Channel Number CH3 ~ CH0 Stop Scan Channel Number BASE+4 bit 3 to bit 0, CL3 ~ CL0, act as a pointer when you program the A/D channel setting (see previous section). When you set the MUX start channel to an analog input channel, AIn ( n = 0, 1, 2…15 ), the gain code, B/U and S/D written to the register of BASE+2, is for channel n.
  • Page 42 the stop channel and then repeat. The following examples show the scan sequences of the MUXs (all channels are set as single-ended). Example 1 If the start scan input channel is AI3 and the stop scan input channel is AI7, then the scan sequence is AI3, AI4, AI5, AI6, AI7, AI3, AI4, AI5, AI6, AI7, AI3, AI4…...

  • Page 43: Control Register

    differential, and AI14 is differential, then the scan sequence is AI11, AI12, AI14, AI11, AI12, AI14, AI11… Warning! Only even channels can be set as differential. An odd channel will become unavailable if its preceding channel is set as differential. The write-only register BASE+6 allows users to set an A/D trigger source and an interrupt source.

  • Page 44: Status Register

    GATE External trigger gate function enable bit Set 1 to enable external trigger gate function, and set 0 to disable. IRQEN Interrupt enable bit Set 1 to enable interrupt, and set 0 to disable. ONE/FH Interrupt source bit Set 0 to interrupt when an A/D conversion occurs, and set 1 to interrupt when the FIFO is half full.

  • Page 45: Clear Interrupt And Fifo

    F/H FIFO Half-full flag This bit indicates whether the FIFO is half-full. 1 means that the FIFO is half-full. F/F FIFO Full flag This bit indicates whether the FIFO is full. 1 means that the FIFO is full. IRQ Interrupt flag This bit indicates the interrupt status.

  • Page 46: D/A Channel 0 Output

    The write-only registers of BASE+10 and BASE+11 accept data for D/A Channel 0 output. Write D/A Output Channel Bit # BASE+11 DA11 DA10 BASE+10 DA11 ~ DA0 Digital to Analog data DA0 is the LSB and DA11 is the MSB of the D/A data. The write-only registers of BASE+12 and BASE+13 accept data for the D/A channel 1 output.

  • Page 47: D/A Reference Control

    The write-only register of BASE+14 allows users to set the D/A reference source. Write D/A Reference Control Bit # BASE+14 DA1_I/E DA1_5/10 DA0_I/E DA0_5/10 DA0_5/10 The internal reference voltage for the D/A output channel 0 This bit controls the internal reference voltage for the D/A output channel 0.
  • Page 48 The PCI-1710/1710HG card offers 16 digital input channels and 16 digital output channels. These I/O channels use the input and output ports at addresses BASE+16 and BASE+17. Read Digital Input Bit # BASE+17 DI15 DI14 DI13 DI12 DI11 DI10 BASE+16 Write Digital Output Bit #...

  • Page 49: Chapter 5 Calibration

    Chapter 5 Calibration...

  • Page 50: Vr Assignment

    Regular calibration checks are important to maintain accuracy in data acquisition and control applications. We provide two calibration programs, ADCAL.EXE and DACAL.EXE, on the PCI-1710/1710HG software CD-ROM. ADCAL.EXE assists you in A/D calibration, and DACAL.EXE in D/A calibration. The ADCAL.EXE and DACAL.EXE make calibrations easy. It leads you through the calibration and setup procedure with a variety of prompts and graphic displays, showing you all of the correct settings and adjustments.
  • Page 51 The following list shows the function of each VR: Function A/D unipolar offset A/D bipolar offset A/D full scale (gain) D/A channel 0 full scale D/A channel 1 full scale Regular and accurate calibration procedures ensure the maximum possible accuracy. The ADCAL.EXE calibration program leads you through the whole A/D offset and gain adjustment procedure.
  • Page 52 A/D code Mapping Voltage Hex. Dec. Bipolar ± 5V Unipolar 0 to 10V 000h -4.9971V 7FFh 2047 -0.0024V 4.9947V 800h 2048 4.9971V FFFh 4095 +4.9947V 9.9918V In a way similar to the ADCAL.EXE program, the DACAL.EXE program leads you through the whole D/A calibration procedure. You can either use the on-board -5 V (-10 V) internal reference voltage or use an external reference.

  • Page 53: Self A/D Calibration

    Under many conditions, it is difficult to find a good enough DC voltage source for A/D calibration. There is a simple method to solve this problem. First, you should calibrate D/A channel 0, DA0_OUT, with internal reference -5 V, and D/A channel 1, DA1_OUT, with reference -10 V .
  • Page 54 PCI-1710/1710HG User's Manual...

  • Page 55: Appendix A: 82C54 Counter Chip Functions

    Appendix A 8524 Counter Chip Functions...
  • Page 56 The PCI-1710/1710HG uses one Intel 82C54 compatible programma- ble interval timer/counter chip. The popular 82C54 offers three independent 16-bit counters, counter 0, counter 1 and counter 2. Each counter has a clock input, control gate and an output. You can program each counter for maximum count values from 2 to 65535.
  • Page 57 The 82C54 programmable interval timer uses four registers at addresses BASE + 24(Dec), BASE + 26(Dec), BASE + 28(Dec) and BASE + 30(Dec) for read, write and control of counter functions. Register functions appear below: Register Function BASE + 24(Dec) Counter 0 read/write BASE + 26(Dec) Counter 1 read/write...
  • Page 58 RW1 & RW0 Select read/write operation Operation Counter latch Read/write LSB Read/write MSB Read/write LSB first, then MSB M2, M1 & M0 Select operating mode Mode Description Stop on terminal count Programmable one shot Rate generator Square wave rate generator Software triggered strobe Hardware triggered strobe Select binary or BCD counting.
  • Page 59 becomes: BASE + 30(Dec) 82C54 control, read-back mode Value CNT = 0 Latch count of selected counter(s). STA = 0 Latch status of selected counter(s). C2, C1 & C0 Select counter for a read-back operation. C2 = 1 select Counter 2 C1 = 1 select Counter 1 C0 = 1 select Counter 0 If you set both SC1 and SC0 to 1 and STA to 0, the register selected...
  • Page 60 The output will initially be low after you set this mode of operation. After you load the count into the selected count register, the output will remain low and the counter will count. When the counter reaches the terminal count, its output will go high and remain high until you reload it with the mode or a new count value.
  • Page 61 The gate input, when low, will force the output high. When the gate input goes high, the counter will start from the initial count. You can thus use the gate input to synchronize the counter. With this mode the output will remain high until you load the count register.
  • Page 62 Before you write the initial count to each counter, you must first specify the read/write operation type, operating mode and counter type in the control byte and write the control byte to the control register [BASE + 30(Dec)]. Since the control byte register and all three counter read/write registers have separate addresses and each control byte specifies the counter it applies to (by SC1 and SC0), no instructions on the operat- ing sequence are required.
  • Page 63 Users often want to read the value of a counter without disturbing the count in progress. You do this by latching the count value for the specific counter then reading the value. The 82C54 supports the counter latch operation in two ways. The first way is to set bits RW1 and RW0 to 0.
  • Page 64 PCI-1750 User's Manual...

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