Advantech PCI-1716 User Manual page 20

Table 2.3: I/O Connector Signal Description
Signal Name
AI<0..15>
AO<0..1>_REF*
AO<0..1>_OUT*
AGND
DI<0..15>
DO<0..15>
CNT0_CLK
CNT0_OUT
CNT0_GATE
ECLK_IN
ECLK_OUT
ECLK_GATE
DGND
+12V
+5V
* Not available for PCI-1716L.
PCI-1716_Series User Manual
Reference Direction
AGND Input
AGND Input
AGND Output
- -
DGND Input
DGND Output
DGND Input
DGND Output
DGND Input
DGND Input
DGND Output
DGND Input
-
DGND Output
DGND Output
12
Description
Analog input terminals.
Each channel pair (AI0 & AI1, AI2 & AI3,
etc.) can be configured as a differential
input channel or two single-ended chan-
nels.
Analog output reference voltage input ter-
minals.
Analog output terminals.
Ground terminals for analog signals.
Digital input terminals.
Digital output terminals.
Counter 0 clock input terminal.
Counter 0 output terminal.
Counter 0 gate input terminal.
External clock input terminal.
It is the external conversion/sample/update
clock source for various functions.
External clock output terminal.
Analog input conversion clock is routed to
this terminal. It can be used to synchronize
acquisition among multiple devices.
External clock gate input terminal.
Ground terminals for digital signals.
+12 V supply output.
+5 V supply output.