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Related Manuals for Advantech PCIE-1841
Summary of Contents for Advantech PCIE-1841
- Page 1 User Manual PCIE-1841 1MS/s/ch, 18-Bit, Simultaneous Analog Input Card...
- Page 2 No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. The information provided in this manual is intended to be accurate and reliable.
- Page 3 This product has passed the CE test for environmental specifications when shielded cables are used for external wiring. We recommend the use of shielded cables. This type of cable is available from Advantech. Please contact your local supplier for ordering information.
- Page 4 Discard used batteries according to the manufacturer's instructions.” Document Feedback To assist us with improving this manual, we welcome all comments and constructive criticism. Please send all feedback in writing to support@advantech.com. Packing List PCIE-1841 or PCIE-1841L x 1 ...
- Page 5 In accordance with IEC 704-1:1982 specifications, the sound pressure level at the operator’s position does not exceed 70 dB (A). DISCLAIMER: These instructions are provided according to IEC 704-1 standards. Advantech disclaims all responsibility for the accuracy of any statements contained herein. PCIE-1841 User Manual...
- Page 6 Don't touch any components on the CPU card or other cards while the PC is on. Disconnect the power before making any configuration changes. The sudden rush of power as you connect a jumper or install a card may damage sensitive electronic components. PCIE-1841 User Manual...
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Page 7: Table Of Contents
Contents Chapter Start Using PCIE-1841/L1 Product Overview..................2 Figure 1.1 Card layout of PCIE-1841/1841L........ 2 Table 1.1: List of connectors and switches........2 Product Features..................2 1.2.1 Board ID..................2 Driver Installation ..................3 Figure 1.2 XNavi installation interface ......... 3 Software Utility .................. - Page 8 A.3.2 Digital Trigger ................30 External Clock Input................30 Trigger Output..................30 Clock Output ................... 31 Multi-Device Synchronization Interface (MDSI) ........31 General ....................31 Function Block ..................31 Figure A.1 Function block of PCIE-1841/1841L......31 PCIE-1841 User Manual viii...
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Page 9: Start Using Pcie-1841/L1
Chapter Start Using PCIE-1841/L... -
Page 10: Product Overview
This chapter provides an overview of Advantech PCI express cards for PCIE-1841 & PCIE-1841L, covering the product lineup, features, and accessories. PCIE-1841 is a 16-channel simultaneous sampling module. PCIE-1841L on the other hand, is a reduced version with 8 acquisition channels. They all feature maximum 18- bit resolution, a sampling rate of 1MS/s for each channel, maximum input range of +/ -20V, and selectable digital filters. -
Page 11: Driver Installation
DAQ devices. All these software packages are available on the Advantech website: http://www.advantech.com/. The Advantech Navigator is a utility that allows you to set up, configure and test your device, and later stores your settings in a proprietary database. -
Page 12: Software Development Using Daqnavi Sdk
FPGA Code Updates The FPGA can also be updated via the interface in Navigator. However, it is not advised to update FPGA without first doing some research. Advantech strongly sug- gests you consult your technical support before starting an FPGA update. -
Page 13: Chapter 2 Installation Guide
Chapter Installation Guide... -
Page 14: Initial Unpacking Check
Hardware Installation After installation of the device drivers is complete, you can install the PCIE-1841/ 1841L card on your computer. However, it is suggested that you refer to the com- puter’s user manual or related documentation if you have any doubts. Please follow the steps below to install the card onto your system. -
Page 15: Signal Connection And Pin Assignment
The analog input signal connection and internal functional block diagram is shown in Figure 2.1. Figure 2.1 Analog input signal connection The device only accepts differential input configuration. Connect the external source between the positive analog input (AI+) terminal and the negative analog input (AI−) terminal. PCIE-1841 User Manual... -
Page 16: Digital Trigger Input Connection
Figures 2.2 and 2.3, respectively. Figure 2.4 shows the signal connection of the digital trigger. Figure 2.2 Rising edge active digital trigger Figure 2.3 Falling edge active digital trigger Figure 2.4 Signal connection of the digital trigger PCIE-1841 User Manual... -
Page 17: Pin Assignment (Cn4)
2.3.3 Pin Assignment (CN4) Figure 2.5 Pin assignment for PCIE-1841/PCIE-1841L Table 2.1: Pin assignment for PCIE-1841/PCIE-1841L Pin Name Direction Description Pin Number AI<0..7>+ Analog input positive terminals for channel 0 14 ~ 21 ~ 7. AI<0..7>- Analog input negative terminals for channel 0 35 ~ 42 ~ 7. -
Page 18: Grounding Considerations
This is shown in Figure 2.7. Figure 2.7 Ground loop effect If a differential (ungrounded) input configuration is used instead, the high input impedance of the negative input terminal prevents ground loop current from flowing, and therefore rejects the common-mode noise. PCIE-1841 User Manual... -
Page 19: Measuring An Ungrounded (Floating) Signal Source
– Route signal lines at right angles to noise generating cables. – Use differential input configuration to reduce common-mode noise. – For externally powered modules, use separate power sources for modules and other noise generating equipment. PCIE-1841 User Manual... -
Page 20: Board Id Configuration
Board ID Configuration The Board ID information can be viewed in Advantech Navigator. This is shown in Figure 2.9. The SW1 on the board sets the number. Table 2.2 shows the switch posi- tion and corresponding numbering. Figure 2.9 Board ID shown in Navigator Table 2.2: SW1 position for Board ID... -
Page 21: Chapter 3 Function Details
Chapter Function Details... -
Page 22: Analog Input
This chapter describes all the functions that the PCIE-1841/PCIE-1841L provide and how they work. Analog Input The following sections describe the analog input acquisition mechanism. 3.1.1 Instant Analog Input Acquisition With instant analog input acquisition, the software controls the sample timing. The analog-to-digital converter (ADC) is continuously converting the analog input signal within its maximum allowable conversion rate. -
Page 23: Buffered Analog Input Acquisition
The low-pass filter removes high frequency noise of the input signal and the noise that is added by the high common-mode voltage amplifier. It can also act as an anti- aliasing filter which avoids alias generation due to ADC conversion. PCIE-1841 User Manual... -
Page 24: Trigger Signal
And another trigger occurs only if the signal has crossed the voltage specified by the threshold level minus the hysteresis value from above before it crosses the threshold level from below again. This is shown in Figure 3.5. Figure 3.5 Rising edge active analog trigger PCIE-1841 User Manual... -
Page 25: Clock Signal
The source device sends the required timing signals to all the follower devices for synchronized acquisition. The timing signals can be wired externally through cables, or internally by the Multi- Device Synchronization Interface (MDSI) cables. PCIE-1841 User Manual... -
Page 26: Synchronization Via External Wiring
It is recom- mended to keep the number of loads for one signal source as three or fewer. Figure 3.7 Multiple device synchronization with daisy-chain topology Figure 3.8 Multiple device synchronization with star topology PCIE-1841 User Manual... -
Page 27: Synchronization Via Mdsi Cables
One of the AI channels MDSI Trigger 0/1 External Digital Trigger 0/1 After all configurations are done, start all the followers before the source. This ensures all the followers are ready when the source sends synchronization signals. PCIE-1841 User Manual... -
Page 28: Configuration For Buffered Analog Input Acquisition
Figure 3.11 shows an example of a 2-sample delay post-trigger acquisition. Refer to the device specifica- tions for possible signal sources. Figure 3.11 Post-trigger acquisition with delay PCIE-1841 User Manual... - Page 29 2 cycles of stop delay. Only the samples in the shaded area are returned. Figure 3.13 About-trigger acquisition The stop trigger can only be a hardware signal. Refer to the device specifications for possible signal sources. PCIE-1841 User Manual...
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Page 30: Streaming Analog Input Acquisition
In a post-trigger acquisi- tion, a start trigger is ignored while the acquisition is in progress. In an about-trigger acquisition, a stop trigger is ignored while the acquisition is being stopped. Figure 3.15 Post-trigger acquisition with re-trigger PCIE-1841 User Manual... - Page 31 Figure 3.16 Pre-trigger acquisition with re-trigger Figure 3.17 About-trigger acquisition with re-trigger Figure 3.18 Streaming acquisition with re-trigger PCIE-1841 User Manual...
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Page 32: Analog Input Calibration
Analog Input Calibration The Navigator of Advantech DAQNavi provides the calibration utility to calibrate the analog input and analog output circuitry of the device. Figure 3.19 shows the inter- face of the calibration utility. Follow the instructions shown to calibrate the device. For a multi-function device, which contains both analog input and analog output func- tions, analog input calibration must be performed before analog output calibration. -
Page 33: Appendix A Specifications
Appendix Specifications... -
Page 34: Analog Input
Analog Input Channels – PCIE-1841: 16 differential – PCIE-1841L: 8 differential Analog-to-digital converter (ADC) resolution: 18-bit Input coupling: DC Input range: ±20 V, ±12.5 V, ±10 V, ±5 V, or ±20 mA, software configurable per channel Maximum input voltage: ±20 V... -
Page 35: Analog Input Characteristics
10 kS/s 100 kS/s 1 MS/s ±20 V -98.53 dB -101.85 dB -102.09 dB ±12.5 V -98.72 dB -102.75 dB -102.84 dB ±10 V -99.85 dB -103.54 dB -101.62 dB ±5 V -102.06 dB -105.08 dB -103.09 dB PCIE-1841 User Manual... - Page 36 10 kS/s 100 kS/s 1 MS/s ±20 V 94.21 dB 90.55 dB 93.75 dB ±12.5 V 94.71 dB 88.81 dB 91.25 dB ±10 V 93.36 dB 86.28 dB 89.57 dB ±5 V 86.12 dB 80.28 dB 83.82 dB PCIE-1841 User Manual...
- Page 37 10 kS/s 100 kS/s 1 MS/s ±20 V -87.52 dB -104.22 dB -102.11 dB ±12.5 V -99.91 dB -103.55 dB -103.45 dB ±10 V -94.78 dB -102.78 dB -101.45 dB ±5 V -92.15 dB -105.12 dB 104.45 dB PCIE-1841 User Manual...
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Page 38: Trigger
Output type: 5 V TTL Output logic level – Logic high: 4.0 V min. @ 2 mA source/5.2 V max. – Logic low: 0.4 V max. @ 2 mA sink Load current: 8 mA max. PCIE-1841 User Manual... -
Page 39: Clock Output
Storage temperature: -40 °C to 70 °C (-40 °F to 158 °F) Operating humidity: 10% to 90% RH, non-condensing Storage humidity: 5% to 95% RH, non-condensing Function Block Figure A.1 Function block of PCIE-1841/1841L PCIE-1841 User Manual... - Page 40 No part of this publication may be reproduced in any form or by any means, such as electronically, by photocopying, recording, or otherwise, without prior written permission from the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. © Advantech Co., Ltd. 2023...
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