2.9
Counter Output Signal Connection
A voltage logic level is generated between the counter output terminal and the digital
ground (DGND) terminal. This is shown in Figure 2.13.
Each counter output channel can source or sink only finite amount of current. If this
limit is exceeded, the output voltage will not stay in the specified voltage logic level.
Refer to the device specifications for the maximum source and skin current values.
PCI-1716_Series User Manual
Figure 2.13 Counter output signal connection.
20