Configuration For Buffered Analog Input Acquisition - Advantech PCI-1716 User Manual

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Figure 3.2 Buffered (hardware-timed) analog input acquisition.
The conversion clock can be generated internally on the device or be provided exter-
nally. Refer to the device specifications for supported conversion clock sources and
the maximum allowable frequency of conversion clock.
The acquired samples are first accumulated in the onboard first-in-first-out (FIFO)
memory of the device, and then moved to the buffer in the PC by a direct memory
access (DMA) engine. A buffer is a block of memory in the PC for temporarily storing
the data to be transferred to the application memory. Because the data is moved in
large blocks instead of one point at a time, buffered acquisition typically allow much
higher transfer rates. Buffered acquisition is also called hardware-timed acquisition.
The advantages of buffered acquisition over instant acquisition include:
The sample rate can be much higher.
The time of sample is deterministic.
Hardware triggers can be used.
3.1.3

Configuration for Buffered Analog Input Acquisition

According to software configurations, buffered analog input acquisition can be classi-
fied into two types:
One-buffered analog input acquisition
Streaming analog input acquisition
3.1.3.1
One-Buffered Analog Input Acquisition
For one-buffered acquisition, only a specified number of samples is acquired. Both
the start and stop of acquisition are controlled by software commands. Only one type
of acquisition can be achieved: post-trigger acquisition.
Post-Trigger Acquisition
A post-trigger acquisition acquires a specified number of samples after the start trig-
ger. The acquisition starts when a start trigger is received and automatically stops
when the specified number of samples is acquired. An example of 5-sample post-trig-
ger acquisition is shown in Figure 3.3.
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PCI-1716_Series User Manual

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