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Advantech PCIE-1751 User Manual

Advantech PCIE-1751 User Manual

48-ch digital i/o and 3-ch counter pci express card
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User Manual
PCIE-1751
48-Ch Digital I/O and 3-Ch
Counter PCI Express Card

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Summary of Contents for Advantech PCIE-1751

  • Page 1 User Manual PCIE-1751 48-Ch Digital I/O and 3-Ch Counter PCI Express Card...
  • Page 2 No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. The information provided in this manual is intended to be accurate and reliable.
  • Page 3 This product has passed the CE test for environmental specifications when shielded cables are used for external wiring. We recommend the use of shielded cables. This type of cable is available from Advantech. Please contact your local supplier for ordering information.
  • Page 4 Document Feedback To assist us with improving this manual, we welcome all comments and constructive criticism. Please send all feedback in writing to support@advantech.com. Safety Precautions - Static Electricity Follow these simple precautions to protect yourself from harm and the products from damage.
  • Page 5 In accordance with IEC 704-1:1982 specifications, the sound pressure level at the operator’s position should not exceed 70 dB (A). DISCLAIMER: These instructions are provided according to IEC 704-1 standards. Advantech disclaims all responsibility for the accuracy of any statements contained herein. PCIE-1751 User Manual...
  • Page 6 PCIE-1751 User Manual...

  • Page 7: Table Of Contents

    Table 3.2: Jumper Channels ............. 17 Table 3.3: Jumper Settings (JP2 ~ JP13)........17 Signal Connections ................. 18 Table 3.4: PCIE-1751 Pin Assignments ........19 Figure 3.2 Digital input signal connection ........19 Figure 3.3 Digital output signal connection........ 20 Figure 3.4 Counter input signal connection .......
  • Page 8 Counter ....................25 Table A.3: Counter..............25 General ....................26 Table A.4: General..............26 Appendix B Function Block Diagram....27 PCIE-1751 User Manual viii...

  • Page 9: Chapter 1 Overview

    Chapter Overview...

  • Page 10: Introduction

    Two other features give the PCIE-1751 practical advantages in an industrial setting. When the system is hot reset (the power is not turned off) PCIE-1751 retains the last I/O port settings and output values if the user has set the JP1 jumper to enable this feature.
  • Page 11 Figure 1.1 and Figure 1.2, respectively. Figure 1.1 Rising edge event counting Figure 1.2 Falling edge event counting Counting may be temporarily paused by the counter gate signal as shown in Figure 1.3. Figure 1.3 Event counting with pause gate PCIE-1751 User Manual...
  • Page 12 This is shown in Figure 1.5 and by the following equation. Figure 1.5 Frequency measurement by counting number of pulses in a fixed duration For counter clock signal frequency higher than that specified in the previous section, this method gives a more accurate result. PCIE-1751 User Manual...
  • Page 13 The output can be gated. If the counter gate is at an active level, pulses are out- put normally. On the other hand, if the counter gate is at an inactive level, output is disabled. Figure 1.8 shows an example of an active high gate. Figure 1.8 Gated timer/pulse output PCIE-1751 User Manual...
  • Page 14 The counter can be re-armed after the previous generation is completed. This is shown in Figure 1.11. Figure 1.11 Finite pulse generation PCIE-1751 User Manual...
  • Page 15 The output can be gated. If the counter gate is high, pulses are output normally. On the other hand, if the counter gate is low, output is disabled. This is shown in Figure 1.13. Figure 1.13 Gated pulse width modulation output PCIE-1751 User Manual...

  • Page 16: Driver Installation

    PCIE system. All these software packages are available on the Advantech website: http://www.advantech.com/. The Advantech Navigator is a utility that allows you to set up, configure and test your device, and later store your settings in a proprietary database.

  • Page 17: Software Development Using Daqnavi Sdk

    XNavi installer. They can be found under C:\Advantech\XNavi (default directory) after finishing the installation. Accessories Advantech offers a complete set of accessory products to support the PCIE-1751 card. These accessories include: –...
  • Page 18 PCIE-1751 User Manual...

  • Page 19: Chapter 2 Hardware Installation

    Chapter Hardware Installation...

  • Page 20: Installation

    This chapter gives users a package item checklist, proper instructions about unpack- ing, and step-by-step procedures for both driver and card installation. Unpacking After receiving your PCIE-1751 package, please inspect its contents first. The pack- age should contain the following items: PCIE-1751 card ...

  • Page 21: Hardware Installation

    Touch the metal part on the surface of your computer to neutralize the static electricity that might be on your body. Insert the PCIE-1751 card into a PCI Express slot. Hold the card only by its edges and carefully align it with the slot. Insert the card firmly into place. Use of excessive force must be avoided, otherwise the card might be damaged.
  • Page 22 After the PCIE-1751 card is installed, you can verify whether it is properly installed on your system through the Device Manager: Access the Device Manager through the Control Panel/System/Device Man- ager. The device name of the PCIE-1751 should be listed on the Device Manager tab as follows.

  • Page 23: Chapter 3 Signal Connections

    Chapter Signal Connections...

  • Page 24: Overview

    Jumper JP1 gives the PCIE-1751 a new and valuable capability. With JP1 enabled, the PCIE-1751 “memorizes” all port I/O settings and output values, and, in the event of a “hot” reset, the settings and output values present at the port just prior to reset are restored to each port following the reset.
  • Page 25 Port 4 DI/O 0 ~ DI/O 7 JP12, JP13 Port 5 DI/O 0 ~ DI/O 7 Table 3.3: Jumper Settings (JP2 ~ JP13) Jumper Setting Description DI/O channels are fixed at output. DI/O channel direction is software-configurable*. * Default setting PCIE-1751 User Manual...

  • Page 26: Signal Connections

    Signal Connections PCIE-1751 Pin Assignments PCIE-1751 User Manual...
  • Page 27 Table 3.4: PCIE-1751 Pin Assignments Pin Name Direction Description Pin Number Bi-directional digital input/output port 0 DI/O Port 0<0..7> 1 ~ 8 terminals. Bi-directional digital input/output port 1 DI/O Port 1<0..7> 10 ~ 17 terminals. Bi-directional digital input/output port 2 DI/O Port 2<0..7>...
  • Page 28 Each digital output channel can source or sink only a finite amount of current. If this limit is exceeded, the output voltage will not stay at the specified voltage logic level. Refer to the device specifications for the maximum source and skin current values. PCIE-1751 User Manual...
  • Page 29 Each counter output channel can source or sink only a finite amount of current. If this limit is exceeded, the output voltage will not stay at the specified voltage logic level. Refer to the device specifications for the maximum source and skin current values. PCIE-1751 User Manual...
  • Page 30 PCIE-1751 User Manual...

  • Page 31: Appendix A Specifications

    Appendix Specifications...

  • Page 32: Digital Input

    Output logic level Logic low 0.4 V max. @ 2 mA sink One channel 8 mA max. Load current Per port summed 20 mA max. Response time 25 ns max. Update type Static software-configurable Initial output value Software-configurable PCIE-1751 User Manual...
  • Page 33 /40 MHz or 50 ppm, whichever is Accuracy larger Measuring type Instant Pulse width range 100 ns ~ 1 s Pulse width resolution 25 ns Pulse width measurement Accuracy 50 ppm Measuring type Instant Counter output function PCIE-1751 User Manual...
  • Page 34 0 °C to 60 °C (32 °F to 140 °F) Storage temperature -20 °C to 70 °C (-4 °F to 158 °F) Environmental Operating humidity 10% to 90% RH, non-condensing Storage humidity 5% to 95% RH, non-condensing PCIE-1751 User Manual...
  • Page 35 Appendix Function Block Diagram...
  • Page 36 PCIE-1751 User Manual...
  • Page 37 PCIE-1751 User Manual...
  • Page 38 No part of this publication may be reproduced in any form or by any means, such as electronically, by photocopying, recording, or otherwise, without prior written permission from the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. ©Advantech Co., Ltd. 2023...

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