Debug Mode Activation; Debug Mode Deactivation; Test Mode; Test Mode Definition - NXP Semiconductors KITFS23LDOEVM User Manual

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Debug mode is helpful during software development if the device has those functions enabled by OTP.

7.3.1.2 Debug mode activation

There are two ways to activate Debug mode:
7.3.1.2.1 With the GUI using mode selection in Connection toolbar (recommended)
1. Set the default jumper configuration. See
2. Verify that switches SW10 and SW12 are OFF (disables OTP 8 V generation).
3. Verify that jumper J30 is ON (enables Debug mode).
4. Plug the USB cable between the PC and the board. The blue LED D14 for OTP 8 V generation is OFF. The
green LED D15 for Debug is ON.
5. Apply power supply VBAT.
6. Open the GUI and start the connection.
7. Check that the GUI has detected Debug mode in the USB and device status bar:
Figure 84. Debug mode active
8. The equipment is now set to Debug mode.
7.3.1.2.2 Without the GUI (hardware only)
1. Set the default jumper configuration. See
2. Verify that switches SW10 and SW12 are OFF (disables OTP 8 V generation).
3. Verify that jumper J30 is ON (enables Debug mode).
4. Apply power supply VBAT.
5. The device powers up and operates in Debug mode. The blue LED D14 for OTP 8 V generation is OFF. The
green LED D15 for Debug is ON.

7.3.1.3 Debug mode deactivation

Once activated, Debug mode can be deactivated by software by sending an I
the ACCESS tool:
• With the thematic tabs: in the Main Tab, in the Device State box, select checkbox Exit Debug mode, then click
Write.
• With the Register Map: in the Functional subtab, set DBG_EXIT bit to 1 in M_SYS1_CFG register.
Note: Taking off Debug Selection jumper J30 will not automatically deactivate Debug mode, as DBG 5 V on
FS2300 DEBUG pin is only a condition for Debug mode entry. Therefore, it is not a condition to remain in Debug
mode.

7.3.2 Test mode

7.3.2.1 Test mode definition

Test mode allows the user to write in the Mirror registers to configure or reconfigure the device for customer
evaluation and to burn OTP fuses.
Note: Mirror registers are an emulation of OTP registers. In case of a POR, the Mirror registers are reset to the
default OTP configuration (empty if OTP not burned).
UM11879
User manual
Section
7.1.
Section
7.1.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 September 2023
UM11879
KITFS23LDOEVM evaluation board
2
C/SPI command via the GUI with
© 2023 NXP B.V. All rights reserved.
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