Table of Contents
Advertisement
NXP Semiconductors
Figure 83
gives an overview of the device modes and actions to do in the GUI or on the EVB to enter or exit
modes. Test mode stays active for as long as nothing is written in TM_ENTRY register. Therefore, it is possible
to be in Test mode and Normal mode at the same time.
Normal mode
Figure 83. Device modes
7.3.1 Debug mode
7.3.1.1 Debug mode definition
The device starts in Debug mode when the hardware is configured accordingly. This mode requires the DBG pin
to be connected to VBOS through a diode to enter Debug mode automatically at startup. On the board, jumper
J30 ON and switches SW10 and SW12 OFF connect the DBG pin to VBOS through a diode.
Debug mode works in parallel with Normal mode or Test mode. When Debug mode is active, the device runs
with limited functionalities as some functions are disabled.
Note: In Debug mode, RSTB 8 seconds timer is disabled, Watchdog is configured with infinite timeout, and the
window is fully opened (equivalent to disabled), the CAN and LIN transceivers are set in Active mode by default.
UM11879
User manual
POR or wake-up from LPON/LPOFF without slot bypass
If VDBG = 8 V
(J30, SW12, SW10 ON)
Debug mode
RSTB 8 s timer disabled, watchdog disabled,
CAN and
OTP mode
Test mode
INIT mode
Watchdog window can be set to fully opened here
Applicative-level Normal mode
System-level Normal mode
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 September 2023
If VDBG = 5 V
(J30 ON, SW12 and SW10 OFF)
LIN transceivers ACTIVE by default
2
If SPI/I
C keys correct
(In GUI: click on
Test
Mirror registers access enabled
OTP registers access enabled
Anything is written in TM_ENTRY
(In GUI: click on
Test
In GUI: click on
Exit OTP Mode
pin to GND
(SW12 OFF)
2
Send SPI/I
C command
(In GUI: Exit debug mode from ACCESS)
Good watchdog refresh
FS0B/LIMP0 released
KITFS23LDOEVM evaluation board
Mode)
Mode)
or pull DEBUG
aaa-052479
UM11879
© 2023 NXP B.V. All rights reserved.
56 / 73
Advertisement
Table of Contents
