Freescale Semiconductor MPC8272ADS User Manual page 104

Interconnect Signals
Table 8-4. P1—CPM Expansion Connector (continued)
Pin No. Signal Name
B7 ATMTXD0 (PA25)
B8 ATMTXD1 (PA24)
B9 ATMTXD2 (PA23)
B10 ATMTXD3 (PA22)
B11 ATMTXD4 (PA21)
FETH1TXD3 (PA21)
B12 ATMTXD5 (PA20)
FETH1TXD2 (PA20)
B13 ATMTXD6 (PA19)
FETH1TXD1 (PA19)
B14 ATMTXD7 (PA18)
FETH1TXD0 (PA18)
B15 ATMRXD7 (PA17)
FETH1RXD0 (PA17)
ATMRXD6 (PA16)
B16
FETH1RXD1 (PA16)
B17 ATMRXD5 (PA15)
FETH1RXD2 (PA15)
ATMRXD4 (PA14)
B18
FETH1RXD3 (PA14)
B19 ATMRXD3 (PA13)
B20 ATMRXD2 (PA12)
ATMRXD1 (PA11)
B21
ATMRXD0 (PA10)
B22
B23 PA9
B24 PA8
B25
B26
B27
B28
B29 PC27
Attribute
I/O, T.S. ATM Transmit Data (7
carries the ATM cell octets, written to the PM5384's transmit FIFO.
This bus is considered valid only when ATMTXEN# is asserted
and are sampled on the rising edge of ATMTFCLK.
When the ATM port is disabled, these lines may be used for any
available respective function.
I/O, T.S. ATM Receive Data (7
carries the cell octets, read from the PM5384 receive FIFO. This
lines are updated on the rising edge of ATMRFCLK
When the ATM port is disabled, these lines are tristated and may
be used for any available respective function.
I/O, T.S. PowerQUICC II's Port A (9:0). Parallel I/O or dedicated CPM lines.
May be used for any of their available functions.
MPC8272ADS User Guide
Description
4
:0). When the ATM port is enabled, this bus
4
:0). When the ATM port is enabled, this bus
3
.