System Backplane; Figure 1-10 System Backplane Block Diagram - HP Integrity rx8620 User's & Service Manual

System Backplane

The system backplane houses the system clock generation logic, the system reset generation logic, DC-to-DC
converters, power monitor logic, and two LBA link-to-PCI converter ASICs. It is the point of connection for
the cell boards, PCI-X backplane, core I/O cards, SCSI cables, bulk power, chassis fans, front panel display,
intrusion switches, and the system scan card.
Figure 1-10 System Backplane Block Diagram
Core I/O 0
Core I/O 1
The LBA PCI bus controllers are placed on the system backplane to facilitate hot-plug capability for the core
I/O cards. The partition for the core I/O card must be shut down before removing the card.
Having the SCSI connectors on the system backplane allows hot-plug for the core I/O card without having to
remove cables in the process. Hot-plug circuitry is located near the system backplane/core I/O card mating
area.
Chapter 1
System Backplane
LBA
LBA
XBC
Detailed HP Integrity rx8620 Server Description
PCI-X Backplane
Cell 0
Cell 1
Cell boards are perpendicular
to the system backplane.
XBC
Cell 2
Cell 3
Introduction
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