6.7.6 Pd Port Group
The Pd port group consists of five ports Pd0–Pd4 and three ports Pd0–Pd2 are configured as a debugging function
port at initialization. These five ports support the GPIO function. The GPIO function of the Pd2 port supports out-
put only, therefore, the pull-up/down function cannot be used.
Table 6.7.6.1 Control Registers for Pd Port Group (S1C17W14/W16)
Register name
Bit
PDDAT
15–13 –
(Pd Port Data
12–8 PDOUT[4:0]
Register)
7–5 –
4–3 PDIN[4:3]
2
1–0 PDIN[1:0]
PDIOEN
15–13 –
(Pd Port Enable
12–11 PDIEN[4:3]
Register)
10
9–8 PDIEN[1:0]
7–5 –
4–0 PDOEN[4:0]
PDRCTL
15–13 –
(Pd Port Pull-up/down
12–11 PDPDPU[4:3]
Control Register)
10
9–8 PDPDPU[1:0]
7–5 –
4–3 PDREN[4:3]
2
1–0 PDREN[1:0]
PDINTF
15–0 –
PDINTCTL
PDCHATEN
PDMODSEL
15–8 –
(Pd Port Mode Select
7–5 –
Register)
4–0 PDSEL[4:0]
PDFNCSEL
15–10 –
(Pd Port Function
9–8 PD4MUX[1:0]
Select Register)
7–6 PD3MUX[1:0]
5–4 PD2MUX[1:0]
3–2 PD1MUX[1:0]
1–0 PD0MUX[1:0]
Table 6.7.6.2 Pd Port Group Function Assignment (S1C17W14/W16)
PdSELy = 0
Port
name
GPIO
Peripheral
Pd0
Pd0
DBG
Pd1
Pd1
DBG
Pd2
Pd2
DBG
Pd3
Pd3
Pd4
Pd4
S1C17W14/W16 TECHNICAL MANUAL
(Rev. 1.2)
Bit name
Initial
0x0
0x00
0x0
–
0x0
0x0
(reserved)
0x0
0x0
0x00
0x0
0x0
(reserved)
0x0
0x0
0x0
(reserved)
0x0
0x0000
0x00
0x0
0x07
0x00
0x0
0x0
0x0
0x0
0x0
PdyMUX = 0x0
PdyMUX = 0x1
(Function 0)
(Function 1)
Pin
Peripheral
DST2
–
DSIO
–
DCLK
–
–
–
–
–
–
–
Seiko Epson Corporation
Reset
R/W
–
R
–
H0
R/W
–
R
x
H0
R
0
–
R
x
H0
R
–
R
–
H0
R/W
0
H0
R/W
H0
R/W
–
R
H0
R/W
–
R
–
H0
R/W
0
H0
R/W
H0
R/W
–
R
H0
R/W
0
H0
R/W
H0
R/W
–
R
–
–
R
–
–
R
H0
R/W
–
R
–
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
PdSELy = 1
PdyMUX = 0x2
(Function 2)
Pin
Peripheral
–
–
–
–
–
–
–
CLG
–
CLG
6 I/O PORTS (PPORT)
Remarks
PdyMUX = 0x3
(Function 3)
Pin
Peripheral
Pin
–
–
–
–
–
–
–
–
–
OSC3
–
–
OSC4
–
–
6-17