Toshiba TMP91C815F Data Book page 86

16bit micro controller tlcs-900/l1 series
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(4) Address Area Size Specification
Table 3.6.1 shows the relationship between CS area and area size.△ Indicates areas that cannot
be set by memory start address register and address mask register combinations. When setting an
area size using a combination indicated by △ , set the start address mask register in the desired steps
starting from 000000H.
If the CS2 area is set to 16M-bytes or if two or more areas overlap, the smaller CS area number
has the higher priority.
Example: To set the area size for CS0 to 128 Kbytes:
!
Valid start addresses
000000H
020000H
040000H
060000H
"
Invalid start addresses
000000H
010000H
030000H
050000H
Size (bytes)
256
512
CS area
CS0
CS1
CS2
CS3
(note): △ Indicates areas that cannot be set by memory start address register
and address mask register combinations.
3.6.2 Chip Select/Wait Control Registers
Figure 3.6.5 lists the Chip Select/Wait Control Registers.
The Master Enable/Disable, Chip Select output waveform, data bus width and number of wait states for
each address area (CS0 to CS3 and others) are set in their respective chip select/wait control registers,
B0CS to B3CS and BEXCS.
128K bytes
128K bytes
Any of these addresses may be set as the start address.
128K bytes
This is not an integer multiple of the desired area size setting.
64K bytes
Hence, none of these addresses can be set as the start address.
128K bytes
128K bytes
Table 3.6.1 Valid area sizes for each CS area
32 K
64 K
128 K
91C815-83
256 K
512 K
1 M
2 M
TMP91C815
4 M
8 M

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