Toshiba TMP91C815F Data Book page 230

3.14.5 RAM built-in type LCD driver control mode (RAM mode)
Data transmission to LCD driver is executed by move instruction of CPU.
After setting mode of operation to control register, when move instruction of CPU is executed
outputs chip select signal to LCD driver connected to the outside from control pin
Therefore control of data transmission numbers corresponding to LCD size
of CPU. There are 2 kinds of addresses of LCD driver in this case, and which is chosen determines by
LCDCTL <MMULCD> register.
It corresponds to LCD driver which has every 1 byte of instruction register and display data register in LCD
driver at the time of <MMULCD> ="0." Please make the transmission place address at this time into either of
FE0H-FE7F. (table 3.14.2references)
It corresponds to address direct writing type LCD driver at the time of <MMULCD> ="1."
transmission place address at this time can also assign the memory area of 3C0000H - 3FFFFF to four area for
every 64 K bytes. (table 3.14.3references)
The example of a setting is shown as follows and connection example is shown in figure 3.14.7 at the time
below. [" / <MMULCD> ="0]
● Setting example : In case of use 80SEG X 65COM LCD driver.
Assign external column driver to LCDC0 and row driver to LCDR0.
This example used LD instruction in setting of instruction and used burst function of micro DMA by
soft start in setting of display data.
; Setting external terminal
; Setting for LCDC
; Setting for mode of LCDC0/LCDR0
; Setting for micro DMA and INTTC(ch0)
In case of store 650 bytes transfer data to LCD
driver in built-in RAM(1000H to 1289H).
LD (PDCR),19H
LD (LCDSAL),01H
LD (LCDCTL),80H
LD (LCDC0L),XX
LD (LCDR0L),XX
LD A,08H
LDC DMAM0,A
LD WA,650
LDC DMAC0,WA
LD XWA,1000H
LDC DMAS0,XWA
LD XWA,0FE1H
LDC DMAD0,XWA
LD (INTETC01),06H
EI 6
LD (DMAB),01H
LD (DMAR),01H
91C815-
227
(D1BSCP
is controlled by instruction
; /CE for LCDC0:D1BSCP,
; /LE for LCDR0:DLEBCD,
; Setting for /DOFF
; Select RAM mode
; LCDON
; Setting instruction for LCDC0
; Setting instruction for LCDR0
; Source address INC mode
;
; count=650
;
; Source address=1000H
;
; Destination address=FE1H(LCDC0H)
;
; INTTC0 level=6
;
; Burst mode
; Soft start
TMP91C815
LCDC
etc.) .
The