Toshiba TMP91C815F Data Book page 33

(2) How to release the Halt mode
These HALT states can be released by resetting or requesting an interrupt. The halt release
sources are determined by the combination between the states of interrupt mask register <IFF2-0>
and the halt modes. The details for releasing the HALT status are shown in Table 3.3 4.
• Released by requesting an interrupt
The operating released from the halt mode depends on the interrupt enabled status.When the
interrupt request level set before executing the HALT instruction exceeds the value of interrupt
mask register,the interrupt due to the source is processed after releasing the halt mode,and CPU
status executing an instruction that follows the HALT instruction. When the interrupt request level
set before executing the HALT instruction is less than the value of the interrupt mask
register,releasing the halt mode is not executed.(in non-maskable interrupts,interrupt processing is
processed after releasing the halt mode regardless of the value of the mask register.) However only
for INT0~INT4 and RTC interrupts,even if the interrupt request level set before executing the
HALT instruction is less than the value of the interrupt mask register, releasing the the halt mode is
executed. In this case,interrupt processing, and CPU starts executing the instruction next to the
HALT instruction,but the interrupt request flag is held at "1".
• Releasing by resetting
Releasing all halt status is executed by resetting.
When the Stop mode is released by RESET,it is necessry enough resetting time (see table 3.3.5)
to set the operation of the oscillator to be stable.
When releasing the halt mode by resetting, the internal RAM data keeps the state before the
"HALT" instruction is executed. However the other settings contents are initialized. (Releasing due
to interrupts keeps the state before the "HALT" instruction is executed.)
91C815-30
TMP91C815