Toshiba TMP91C815F Data Book page 145

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Transmission
In SCLK output mode 8-bit data and a synchronous clock are output on the TXD0 and SCLK0
pins respectively each time the CPU writes the data to the Transmission Buffer. When all data is
output, INTES0 <ITX0C> will be set to generate the INTTX0 interrupt.
Timing to write
transmisison data
SCLK0 output
TXD0
ITX0C (INTTX0
interrupt request)
Figure 3.9.19 Transmitting Operation in I/O Interface Mode (SCLK0 Output Mode)
In SCLK Input Mode, 8-bit data is output on the TXD0 pin when the SCLK0 input becomes
active after the data has been written to the Transmission Buffer by the CPU.
When all data is output, INTES0 <ITX0C> will be set to generate INTTX0 interrupt.
SCLK0 input
(<SCLKS>=0: Rising edge mode)
SCLK0 input
(<SCLKS>=1: Falling edge mode)
TXD0
ITX0C (INTTX0
intterrupt reqest)
Figure 3.9.20 Transmitting Operation in I/O Interface Mode (SCLK0 Input Mode)
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Receiving
In SCLK output mode, the synchronous clock is outputted from SCLK0 pin and the data is shifted
to Receiving Buffer 1. This starts when the Receive Interrupt flag INTES0<IRX0C> is cleared by
reading the received data. When 8-bit data are received, the data will be transferred to Receiving
Buffer 2 (SC0BUF according to the timing shown below) and INTES0<IRX0C> will be set to
generate INTRX0 interrupt.
The outputting for the first SCLK0 starts by setting SC0MOD0<RXE>to 1.
IRX0C(INTRX0
intterrupt request)
SCLK0 output
RXD0
Figure 3.9.21 Receiving operation in I/O Interface Mode (SCLK0 Output Mode)
bit 0 bit 1
bit 0 bit 1 bit 5
bit 0 bit 1
91C815-142
TMP91C815
bit 6 bit 7
bit 6 bit 7
bit 6 bit 7