Toshiba TMP91C815F Data Book page 111

Select System Select Prescaler
Clock Clock
<PRCK1 ∼ PRCK0>
<SYSCK>
1 (fs)
00
(f )
FPH
0 (fc)
10
(fc/16 clock)
XXX: Don't care
(5) Settings for each mode
Table 3.7.4 shows he SFR settings for each mode.
Register name
<Bit Symbol> <TA01M1:TA01M 0>
Function
8-bit timer × 2 channels
16-bit timer mode
8-bit PPG × 1 channel
8-bit PWM × 1 channel
8-bit timer × 1 channel
(note): "−" = Don't care
Table 3.7.3 PWM cycle
Gear Value
2
<GEAR2 ∼ GEAR0>
φ T1
XXX
15.4 ms 61.5 ms
31.5 µs 126 µs
000 (fc)
fc
63.0 µs 252 µs
001 ( /2)
fc 126 µs 504 µs
010 ( /4)
fc 252 µs 1008 µs
011 ( /8)
fc 504 µs 2016 µs
100 ( /16)
504 µs 2016 µs
XXX
Table 3.7.4 Timer mode setting registers
TA01MOD
<PWM01:00>
Timer mode PWM cycle
−
00
−
01
−
10
− 1, 2 − 1, 2
6 7 8
2
11
(01, 10, 11)
−
11
91C815-
PWM cycle
− 1 − 1
6 7
2
φ T4 φ T16 φ T1 φ T4
246 ms 31.0 ms 124 ms
504 µs 63.5 µs 254 µs
1008 µs 127 µs 508 µs
2016 µs 254 µs 1016 µs
4032 µs 508 µs 2032 µs
8064 µs 1016 µs 4064 µs
8064 µs 1016 µs 4064 µs
<TA1CLK1:0> <TA0CLK1:0>
Upper timer input Lower timer
clock input clock
External clock
Lower timer match
φ T1, φ T16, φ T256 φ T1, φ T4, φ T16
(00, 01, 10, 11) (00, 01, 10, 11)
External clock
− φ T1, φ T4, φ T16
(00, 01, 10, 11)
External clock
φ T1, φ T4, φ T16
−
(00, 01, 10, 11)
External clock
− 1
− φ T1, φ T4, φ T16
(00, 01, 10, 11)
φ T1, φ T16 , φ T256
(01, 10, 11)
108
TMP91C815
@fc = 16 MHz, fs = 32.768 kHz
− 1
8
2
φ T16 φ T1 φ T4 φ T16
496 ms 62.3 ms 249 ms 996 ms
1016 µs 127.5 µs 510 µs 2040 µs
2032 µs 255 µs 1020 µs 4080 µs
4064 µs 510 µs 2040 µs 8160 µs
8128 µs 1020 µs 4080 µs
16.32 ms
2040 µs 8160 µs
ms 32.64 ms
16.256
2040 µs 8160 µs
32.64 ms
16.256 ms
TA1FFCR
TAFF1IS
Timer F/F invert signal
select
0: Lower timer output
1: Upper timer output
−
−
−
−
Output disabled