Toshiba TMP91C815F Data Book page 107

16bit micro controller tlcs-900/l1 series
Table of Contents

Advertisement

In this mode, a programmable square wave is generated by inverting the timer output each time
the 8-bit up-counter (UC0) matches the value in one of the timer registers TA0REG or TA1REG.
The value set in TA0REG must be smaller than the value set in TA1REG.
Although the up-counter for TMRA1 (UC1) is not used in this mode, TA01RUN<TA1RUN>
should be set to "1", so that UC1 is set for counting.
Figure 3.7.13 shows a block diagram representing this mode.
Selector
φ T1
φ T4
φ T16
TA01MOD<TA0CLK1:0>
Selector
Shift trigger
TA0REG-WR
TA01RUN<TA0RDE>
Figure 3.7.13 Block diagram of 8-Bit PPG Output Mode
If the TA0REG double buffer is enabled in this mode, the value of the register buffer will be
shifted into TA0REG each time TA1REG matches UC0.
Use of the double buffer facilitates the handling of low-duty waves (when duty is varied).
Match with TA0REG
and up-Counter
Match with TA1REG
TA0REG
(Value to be compared)
Register buffer
TA01RUN<TA0RUN>
8-bit
up-counter (UC 0)
Comparator
Comparator
TA0REG
Register Buffer
TA1REG
Internal bus
(Up-counter = Q
)
(Up-countner = Q
1
Q
1
Q
2
Figure 3.7.14 Operation of register buffer
91C815-
104
TA1OUT
TA1FF
TA1FFCR<TAFF1IE>
Inversion
INTTA0
INTTA1
)
2
Shift from register buffer
Q
2
Q
3
TA0REG (register buffer)
write
TMP91C815

Advertisement

Table of Contents
loading

Table of Contents