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Example: To generate 1/4-duty 50-kHz pulses (at fc = 16 MHz):
∗ Clock state
System clock: High frequency (fc)
Clock gear: 1 (fc)
Prescaler clock: f
Calculate the value which should be set in the timer register.
To obtain a frequency of 50 kHz, the pulse cycle t should be: t = 1/50 kHz = 20 μsec
φT1 = 0.5 µsec (at 16 MHz);
20 µsec / 0.5 µsec = 40
Therefore set TA1REG to 40 (28H)
The duty is to be set to 1/4: t × 1/4 = 20 µsec × 1/4 = 5 µsec
5 µsec / 0.5 µsec = 10
Therefore, set TA0REG = 10 = 0AH.
7
6
←
TA01RUN
0
X
←
TA01MOD
1
0
←
TA0REG
0
0
←
TA1REG
0
0
← X
TA1FFCR
X
← X
P7CR
–
← X
P7FC
–
←
TA01RUN
1
X
(note): X = Don't care; "−" = No change
20 µ s
FPH
5
4
3
2
1
0
X
X
–
0
0
0
X
X
X
X
0
1
0
0
1
0
1
0
1
0
1
0
0
0
X
X
0
1
1
X
–
–
–
–
1
–
–
–
–
–
1
X
X
X
–
1
1
1
91C815-105
Stop TMRA0 and TMRA01 and clear it to "0".
Set the 8-bit PPG mode, and select φ T1 as input clock.
Write 0AH
Write 28H
Set TA1FF, enabling both inversion and the double buffer.
Writing "10" provides negative logic pulse.
Set PB1 as the TA1OUT pin.
Start TMRA0 and TMRA01 counting.
TMP91C815
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