Toshiba TMP91C815F Data Book page 219

16bit micro controller tlcs-900/l1 series
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table 3.14.2 Memory mapping for built-in RAM sequential access type.
Register
Address
RAM built-in type
LCDC1L
0FE0H
LCDC1H
0FE1H
RAM built-in type
LCDC2L
0FE2H
LCDC2H
0FE3H
RAM built-in type
LCDC3L
0FE4H
LCDC3H
0FE5H
RAM built-in type
LCDR1L
0FE6H
LCDR1H
0FE7H
table 3.14.3 Memory mapping for built-in RAM random access type
Address
3C0000H 〜
3CFFFFH
3D0000H 〜
3DFFFFH
3E0000H 〜
3EFFFFH
3F0000H 〜
3FFFFFH
note1: We call built-in RAM sequential access type LCD driver that use register to access to display-ram
without address.(Ex. T6B65A,T6C84 etc: mar/2000)
We call built-in RAM random access type LCD driver that is same method to access to
SRAM.(Ex.T6C23,T6K01 etc: mar/2000)
Purpose
Sequential access type
Instruction
driver 1
Display data
Instruction
driver 2
Display data
Instruction
driver 3
Display data
Instruction
driver
Display data
Purpose
Random access type
RAM built-in type driver 1
RAM built-in type driver 2
RAM built-in type driver 3
RAM built-in type driver 4
91C815-
216
TMP91C815
A0
Chip enable
terminal
terminal
D1BSCP
0
1
D2BLP
0
1
D3BFR
0
1
DLEBCD
0
1
Chip enable
terminal
D1BSCP
D2BLP
D3BFR
DLEBCD

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