Renesas R-IN32M3 Series User Manual page 63

R-IN32M3-CL User's Manual
6.1.1 CC-Link IE Field (Intelligent Device Station) Clock Gate Register (CIECLKGTD)
The CIECLKGTD register is used to temporarily stop supply of the bus clock signal. This is to prevent the generation of
a clock glitch when switching the bus clock signal from the CC-Link IE field network. Writing 1 to the effective bit of
this register stops supply of the clock signal and writing 0 to it causes supply to resume. Before making the setting to
enable the SRAM bus path from an external MCU, be sure to use this register to stop the bus clock signal.
• Access
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
CIECLKGTD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0
R/W
Bit Position Bit Name
0 CIECLKGTD
R18UZ0005EJ0400
Dec. 28, 2018
This register can be read and written in 32-bit or 16-bit units.
0 0 0 0 0 0 0 0 0
Stops supply of the bus clock signal in the CC-Link IE field network.
0: Operating
1: Stopped
6. CC-Link IE Field (Intelligent Device Station) Function
0 0 0 0 0 0 0 0 0
Description
8 7 6 5 4 3 2 1 0
0 R/W
0 0 0 0 0 0 0
Page 53 of 104
Address
4001 0938H
Initial value
0000 0000H