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5.7.6b Permanent IRIG-B Source Connection
Having a permanently connected IRIG-B source provides the most accurate M87x clock.
In addition to correcting the frequency for the crystal error, the M87x will constantly receive
corrections to compensate for any drift that may still occur. This provides for a typical
clock error of less than 10 microseconds.
5.7.7 Stages of IRIG-B Synchronization and Accuracy
There are four basic stages of synchronization with an IRIG-B source: power-up, time lock,
frequency lock, and final lock.
5.7.7a Power-Up Stage
Upon Power-up, the M87x obtains the time from its non-volatile capacitor backed-up clock.
This clocks resolution is limited to seconds. Therefore, even if the clock was error free
when it was turned off, the M87x could have an error of up to one second when it is
powered-up. The typical crystal error rate is about 20 microseconds per second (20ppm).
Therefore, if we assume that the M87x clock was keeping perfect time before it was reset
(or powered down), it would typically be in error by:
(20 microseconds) x (number of seconds off) + 0.5 seconds after power is restored.
The M87x would start with this error and continue to drift by the frequency offset error. If
the M87x were never connected to an IRIG-B source (or other clock synchronizing
source), the drift would be equal to the crystal's frequency error. If the M87x previously
stored a frequency correction constant in non-volatile memory, the device will include the
compensation and drift by a smaller amount equal to the true crystal frequency error minus
the correction constant.
5.7.7b Time Lock Stage
Once the M87x begins to receive IRIG-B frames, validates a sample buffer, and calculates
a clock correction value, it will enter the Time Lock Stage of synchronization. If the clock
correction value exceeds 120 seconds, the clock is jammed with the present IRIG-B time.
Otherwise, the M87x clock is slewed to match the IRIG-B time.
The accuracy of this initial slew depends on whether a frequency correction constant was
previously stored in non-volatile memory, and if so how accurate the constant is. The
M87x will use this constant in the slew calculation to approximate the rate to change the
clock to adjust to the specified IRIG-B correction error.
The M87x will remain in the Time Lock Stage for approximately five minutes plus the time
required to perform the initial clock slew. The clock slew requires approximately 30 times
the clock correction value. For example, if the initial clock correction error was 1.5
seconds, the Time Lock Stage would require approximately 6 minutes (5 minutes plus 45
seconds to slew).
76
ML0021
August 15, 2018
Copyright 2018 Bitronics, LLC
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