Mitsubishi Electric MELSEC iQ-R Series User Manual page 168

Process cpu module
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Wiring example
The following figure shows a wiring example.
(+)
R (Normally
closed contact)
(-)
(+)
TD
(-)
24V
• Supply the 24V power using the power supply module (R62P) or the 24V external power supply. When using the R62P,
ensure that the power capacity does not exceed the limit. When using the 24V external power supply, use the same power
source as the one that supplies power to the power supply module in each system.
• TD is an on delay timer wired externally. Connect the output signal wire of the on delay timer to a relay (normally closed
contact). To prevent both systems from starting up simultaneously, configure different timer settings for system A and
system B.
• R is a relay (normally closed contact) wired externally. This relay connects the output signal wire of the on delay timer and
the output device (Y30: Control system (own system)). The output signal wire of the relay is input to X20.
■I/O signals
The following table lists the details on the I/O signals.
Device No.
Signal name
X20
Control System Start-up Setting (Input (X))
With the timer wired externally, this bit turns on after a certain time. When the output Y of the other system is off (control system (own
system)) at that time, the system starts as the control system.
Y30
Control system (own system)
■Setting time of the external on delay timer
For the external timer, with the following equation as a guide, set a longer time than the time until both systems start up so that
this function (Automatic start-up at tracking communication error) is not executed when tracking communications are normally
performed. In addition, set different times to system A and system B so that the times of both systems are not up
simultaneously.
• Time set for the external timer
+  Time lag of power-on +   +  
 Start-up time of the CPU module: Time from when the CPU module is powered on until when the CPU module enters to the RUN state
 One scan time: Time until when Y30 (Control system (own system)) is refreshed
 Time lag of power-on: Time to add to the external timer of the system that has started up first when two systems start up one by one. It adjusts the
activation timing of the external timer.
 : Margin for variation in start-up time of the CPU module. Set a sufficient margin to accommodate the variation.
 : Time to add to the timer of either of two systems so that the times of both systems are not up simultaneously
*1 If the time set for the external timer is shorter than the time determined by the above equation or an identical time is set to system A and
system B, one system cannot recognize whether the other system has started up as the control system and both systems may start up
as control systems.
11 BASIC CONCEPT OF REDUNDANT SYSTEM
166
11.6 System Determination
Input
Output
X20: Control System
Y30: Control
Start-up Setting
system
(Input (X))
(own system)
V(+)
COM(+)
COM(-)
*1
=  Start-up time of the CPU module (Time from power-on until RUN) +  One scan time
Input
X20: Control System
COM(+)
(+)
R (Normally
closed contact)
(-)
(+)
TD
(-)
24V
Output
Y30: Control
Start-up Setting
system
(Input (X))
(own system)
V(+)
COM(-)

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