Hardware Layout And Configuration; Figure 2. Hardware Block Diagram - ST STM3210E-EVAL User Manual

Hardware layout and configuration

5 Hardware layout and configuration
The STM3210E-EVAL Evaluation board is designed around the STM32F103ZGT6
microcontroller in a 144-pin TQFP package. The hardware block diagram in
illustrates the connections between the STM32F103ZGT6 and peripherals (LCD, SPI flash,
USART, IrDA, USB, audio, CAN bus, smartcard, microSD™ card, NOR flash, NAND flash,
SRAM, temperature sensor, audio DAC, and motor control) and
these features on the actual Evaluation board.
3.3 V regulator
512 K x 16 SRAM
1-Gbit NAND
128-Mbit NOR
TFT LCD
64-Mbit/128-Mbit
serial flash
MC control
connector
microSD™ card
Temperature sensor
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Figure 2. Hardware block diagram

FSMC
SPI1
MC
SDIO
I2C
JTAG
Debug
Trace
I2S
GPIO
STM32103Z
USART 1
USART 2
USART 4
USART 3
CAN
ADC
USB
UM0488 Rev 7
Figure 2
Figure 3 helps to locate
Audio DAC
LEDs, key, and joystick
QST connector
Extension connector
for GPIOs
RS-232 USART 1
DB9 connector
transceiver
RS-232 USART 2
transceiver DB9 connector
IrDA
transceiver
SmartCard
SmartCard
interface connector
CAN CAN
DB9 connector
transceiver
3 BNC connectors
Potentiometer
USB Type-B
connector
MS55185V2
UM0488