Sram; Nand Flash - ST STM3210E-EVAL User Manual

UM0488
CN16 pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
5.18

SRAM

512Kx16 SRAM is connected to bank1 NOR/PSRAM3 of the FSMC interface and both 8-bit
and 16-bit access are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM
respectively.
5.19

NAND flash

The 512 Mbit x8 or 1 Gbit x8 NAND flash is connected to bank2 of the FSMC interface. The
ready/busy signal can be connected to either the WAIT signal or the FSMC_INT2 signal of
the STM32F103ZGT6 depending on the setting of the JP7 jumper.
Table 14. LCD modules (continued)
TFT LCD (CN16) (Default)
Description Pin connection
PD5 FSMC_D4
PD6 FSMC_D5
PD7 FSMC_D6
PD8 FSMC_D7
PD10 FSMC_D8
PD11 FSMC_D9
PD12 FSMC_D10
PD13 FSMC_D11
PD14 FSMC_D12
PD15 FSMC_D13
PD16 FSMC_D14
PD17 FSMC_D15
BL_GND GND
BL_control 3.3V
VDD 3.3V
VCI 3.3V
GND GND
GND GND
BL_VDD 3.3V
SDO PA6 via JP26
SDI PA7 via JP27
U18 pin
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UM0488 Rev 7
Hardware layout and configuration
Graphic LCD (U18) (Optional)
Description Pin connection
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
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