Hardware layout and configuration
5.5
Audio
The STM3210E-EVAL Evaluation board supports stereo audio play because it provides an
audio DAC connected to both the I
STM32F103ZGT6 microcontroller. Either external slave mode or PLL slave mode (BICK or
LRCK reference clock) of audio DAC can be used by setting the JP18 jumper.
The I2S_MCK is multiplexed with smartcard and motor control and can be enabled by
setting the JP15 jumper. Refer to
power-down mode when the PDN pin is pulled down by PG11.
Jumper
JP18
5.6
Serial flash
A 64 or 128 Mbit serial flash connected to SPI1 of STM32F103ZGT6 serial flash chip select
is managed by IO-pin PB2. The SPI1_MISO is multiplexed with motor control, it can be
enabled by setting the JP3 jumper. Refer to
5.7
CAN
The STM3210E-EVAL Evaluation board supports CAN 2.0 A/B compliant CAN-bus
communication based on a 3.3 V CAN transceiver. High-speed mode, standby mode, and
slope control mode are available and can be selected by setting the JP8 jumper.
Jumper
JP8
JP6
14/45
Table 6. Audio related jumpers
External slave mode (MCK from STM32F103ZGT6) is selected when
JP18 is set as shown (Default setting).
PLL slave mode (BICK or LRCK reference clock) is selected when JP18 is
set as shown.
Table 7. CAN related jumpers
CAN transceiver works in standby mode when JP8 is set as shown.
CAN transceiver works in high-speed mode when JP8 is set as
shown (Default setting).
CAN transceiver works in slope-control mode when JP8 is OFF.
CAN terminal resistor is enabled when JP6 is ON.
The default setting is OFF.
2
S port and two channels of DAC of the
Section 5.9: Motor control
Description
Section 5.9: Motor control
Description
UM0488 Rev 7
for details. Audio DAC is in
1 2 3
for details.
1 2 3
UM0488
1 2 3
1 2 3
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