Xilinx Virtex-7 FPGA VC7222 Getting Started Manual page 52

10. In the Manage IP window
and select Open IP Example Design
press OK, and the design opens in a new Vivado window.
X-Ref Target - Figure 2-8
VC7222 IBERT Getting Started Guide
UG971 (Vivado Design Suite v2015.1) April 27, 2015
(Figure 2-3), in the Sources window, right-click the IBERT IP
(Figure 2-8). Specify a location to save the design,
Figure 2-8: Open IP Example Design
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Chapter 2: Creating the GTH IBERT Core
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