Alinx Cyclone IV FPGA User Manual page 52

Figure 20-3: 7-segment displays on the FPGA board
7-segment displays Pin Assignments:
Pin Name
SMG_Data[7]
SMG_Data[6]
SMG_Data[5]
SMG_Data[4]
SMG_Data[3]
SMG_Data[2]
SMG_Data[1]
SMG_Data[0]
Scan_Sig[5]
Scan_Sig[4]
Scan_Sig[3]
Scan_Sig[2]
Scan_Sig[1]
Scan_Sig[0]
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Cyclone IV FPGA Development Board AX515 User Manual
FPGA Pin
M16
N22
N21
M19
N16
M20
M22
W20
W19
AA21
T18
T17
G17
M21
Contact Email: rachel.zhou@alinx.com.cn
Description
Corresponding segment DP
Corresponding segment G
Corresponding segment F
Corresponding segment E
Corresponding segment D
Corresponding segment C
Corresponding segment B
Corresponding segment A
The first digital tube from the right
The second digital tube from the right
The third digital tube from the right
The fourth digital tube from the right
The fifth digital tube from the right
The sixth digital tube from the right