Part 17.1: Expansion Header J1 - Alinx Cyclone IV FPGA User Manual

supply, 3-channle ground and 34 IOs.
to the 5V device to avoid burning the FPGA. If you want to connect 5V
equipment, you need to connect level conversion chip.
A 33 ohm resistor is connected in series between the expansion port and
the FPGA connection to protect the FPGA from external voltage or current. Here
is a description of the connections and signals for each expansion header

Part 17.1: Expansion header J1

Figure 17-1 shows the J1 expansion port connection diagram. Pin1, Pin37,
Pin38 are GND, Pin2 is +5V, and Pin39 and Pin40 are +3.3V.
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Cyclone IV FPGA Development Board AX515 User Manual
Figure 17-1: Expansion header J1 schematic
Contact Email: rachel.zhou@alinx.com.cn
Do not directly connect the IO directly