Part 2.3: Ddr3 Dram - Alinx ZYNQ7000 FPGA User Manual

Figure 2-2-3: TheXC7Z020 chip used on the Core Board

Part 2.3: DDR3 DRAM

The AC7015 core board is equipped with two SK Hynix DDR3 SDRAM chips (1GB total),
model H5TQ4G63AFR-PBI. The bus width of DDR3 SDRAM is 32 bits in total. DDR3 SDRAM
has a maximum operating speed of 533MHz (data rate 1066Mbps). The DDR3 memory system
is directly connected to the memory interface of the BANK 502 of the ZYNQ Processing System
(PS). The specific configuration of DDR3 SDRAM is shown in Table 2-3-1
Bit Number
U5,U6
The hardware design of DDR3 requires strict consideration of signal integrity.
We have fully considered the matching resistor/terminal resistance, trace
impedance control, and trace length control in circuit design and PCB design to
ensure high-speed and stable operation of DDR3.
The hardware connection of DDR3 DRAM is shown in Figure 2-3-1:
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ZYNQ FPGA Development Platform AX7015 User Manual
Chip Model
H5TQ4G63AFR-PBI
Table 2-3-1: DDR3 SDRAM Configuration
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Capacity
256M x 16bit
Factory
SK Hynix