Part 2.8: Size Dimension; Part 2.9: Board-To-Board Pin Definition - Alinx KINTEX-7 FPGA User Manual

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KINTEX-7 FPGA Development Board AV7K300 User Manual

Part 2.8: Size Dimension

Figure 2-8-1: AC7K325 Core Board Size Dimension

Part 2.9: Board-to-Board Pin Definition

The core board expands a total of 4 high-speed expansion ports, using 4
120-Pin inter-board connectors (J29~J32) to connect to the carrier board. The
connector
uses
Panasonic's AXK5A2137YG,
and
the
corresponding
connector model is AXK6A2337YG in the carrier board. J29 is connected to
GTX transceiver signal, J30 is connected to JTAG and BANK17, IO of BANK18,
J31 is connected to BANK15, IO of BANK15, and J32 is connected to IO and
5V power supply of BANK12 and BANK13.
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