Getac 9270D Service Manual page 9

1.2.1 Intel Arrandale CPU Processor
1.2.1.1 CPU – Intel Arrandale
Arrandale Processor Introduction
Arrandale is the next generation of 64-bit, multi-core mobile processor built on 32- nanometer process
technology. Throughout this document, Auburndale may be referred to as simply the processor. Based on the
low-power/high-performance Nehalem micro-architecture, the processor is designed for a two-chip platform as
opposed to the traditional three-chip platforms (processor, GMCH, and ICH). The two-chip platform consists of
a processor and the Platform Controller Hub (PCH) and enables higher performance, lower cost, easier
validation, and improved x-y footprint. The PCH may also be referred to as Mobile Intel® 5 Series Chipset
(formerly Ibex Peak- M). Auburndale is designed for the Calpella platform and is offered in an rPGA988A or a
BGA1288 package. Included in this family of processors is an integrated graphics and memory controller die on
the same package as the processor core die. This two-chip solution of a processor core die with an integrated
graphics and memory controller die is known as a multi-chip package (MCP) processor.
Note: Integrated graphics and memory controller die is built on 32-nanometer process technology
Processor Feature Details
Four execution cores
A 32-KB instruction and 32-KB data first-level cache (L1) for each core
A 256-KB shared instruction/data second-level cache (L2) for each core